Posts for si-list, 02-2004

Browse: Last Month: 01-2004 Main Archive Page Next Month: 03-2004

» [SI-LIST] Re: Gigabit Ethernet Magnetics -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Gigabit Ethernet Magnetics -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Signal Integrity Opening at Intel, Oregon -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: Pcad2000/2001 to Protel converter -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] FW: Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: IBIS Newbie -
» [SI-LIST] Re: IBIS Newbie -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] Re: DC power distribution -
» [SI-LIST] DC power distribution -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: HSPICE question -
» [SI-LIST] Re: How to connect Chassis ground to DGND -
» [SI-LIST] How to connect Chassis ground to DGND -
» [SI-LIST] Pcad2000/2001 to Protel converter -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: IBIS Newbie -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] HSPICE question -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: IBIS Newbie -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] IBIS Newbie -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] PowerMesh article available for download -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Middle (Star) Termination -
» [SI-LIST] Re: Extract/Convert Lumped Spice model to T-line model -
» [SI-LIST] Re: Errata list for High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices -
» [SI-LIST] Re: SPICE module manual -
» [SI-LIST] Re: Current mode current stealing simulation by IBIS file -
» [SI-LIST] Re: Extract/Convert Lumped Spice model to T-line model -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: Current mode current stealing simulation by IBIS file -
» [SI-LIST] Re: SPICE module manual -
» [SI-LIST] Middle (Star) Termination -
» [SI-LIST] Regulator Heat dissipation -
» [SI-LIST] Re: Errata list for High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices -
» [SI-LIST] Re: Current mode current stealing simulation by IBIS file -
» [SI-LIST] Errata list for High-Speed Digital System Design: A Handbook of InterconnectTheory and Design Practices -
» [SI-LIST] Extract/Convert Lumped Spice model to T-line model -
» [SI-LIST] Current mode current stealing simulation by IBIS file -
» [SI-LIST] Staggered IO Layouts -
» [SI-LIST] Re: SPICE module manual -
» [SI-LIST] SPICE module manual -
» [SI-LIST] Re: alter processing in Berkeley 3f4 spice -
» [SI-LIST] Re: alter processing in Berkeley 3f4 spice -
» [SI-LIST] alter processing in Berkeley 3f4 spice -
» [SI-LIST] Re: Four model types of "single line model" in ICM 1.0 -
» [SI-LIST] Amkor Job Opening -
» [SI-LIST] Access granted to send emails to bob@cambriandesign.com -
» [SI-LIST] Re: PECL lines -
» [SI-LIST] Re: FW: Question: Heterodyne Mixer ? -
» [SI-LIST] Re: FW: Question: Heterodyne Mixer ? -
» [SI-LIST] Re: PECL lines -
» [SI-LIST] PECL lines -
» [SI-LIST] Re: FW: Question: Hetrodyne Mixer ? -
» [SI-LIST] FW: Question: Hetrodyne Mixer ? -
» [SI-LIST] Four model types of "single line model" in ICM 1.0 -
» [SI-LIST] First Call for IBIS SUMMIT at DesignCon East 2004 -
» [SI-LIST] Boston area, Impedance and Materials, 02-Mar -
» [SI-LIST] Re: FW: Upcoming Training Reminder -
» [SI-LIST] Re: Hai -
» [SI-LIST] Re: FW: Upcoming Training Reminder -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Even and odd mode capacitances and inductances of coupled lines -
» [SI-LIST] Re: Even and odd mode capacitances and inductances of coupled lines -
» [SI-LIST] Even and odd mode capacitances and inductances of coupled lines -
» [SI-LIST] Re: DQS vs DDR CLOCK TIMING -
» [SI-LIST] DQS vs DDR CLOCK TIMING -
» [SI-LIST] Re: Separate GND for Analog & Digital -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] need fastcap program -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: GND Separation for Analog & Digital circuits -
» [SI-LIST] GND Separation for Analog & Digital circuits -
» [SI-LIST] Re: Hai -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: FW: Upcoming Training Reminder -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: FW: Upcoming Training Reminder -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] FW: Upcoming Training Reminder -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Fw: Hai -
» [SI-LIST] Re: Hai -
» [SI-LIST] Re: Convergence problem after inserting detailedconnector model -
» [SI-LIST] Re: Separate GND for Analog & Digital -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Separate GND for Analog & Digital -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: ref for mmic layout -
» [SI-LIST] ref for mmic layout -
» [SI-LIST] Re: Convergence problem after inserting detailed co nnector model -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Convergence problem after inserting detailed connector model -
» [SI-LIST] Re: Convergence problem after inserting detailed connectormodel -
» [SI-LIST] Re: Separate GND for Analog & Digital -
» [SI-LIST] Convergence problem after inserting detailed connector model -
» [SI-LIST] Solid modelling -
» [SI-LIST] .MEAS INSIDE TRAN HSPICE -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Separate GND for Analog & Digital -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Separate GND for Analog & Digital -
» [SI-LIST] R: Layout Cross Section -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] How to do Z(f), Y(f) sweep in Q2D? -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: Test message -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Test message -
» [SI-LIST] Re: Layout Cross Section -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Layout Cross Section -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: IBIS QUALITY -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Modeling Probe Pins as Connector Model in LineSim -
» [SI-LIST] [SI-LIST]-COUPLER- How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] How do you perform a frequency sweep of a differential coupled line model in Hspice ? -
» [SI-LIST] Call For Papers: EPEP 2004 -
» [SI-LIST] Applications Engineer Position -
» [SI-LIST] Re: carbon fiber pre-preg characteristics? -
» [SI-LIST] Applications Engineer -
» [SI-LIST] Re: carbon fiber pre-preg characteristics? -
» [SI-LIST] Re: Package, pad, bond, and bond wire parasitic capacitence USB 2.0 HS -
» [SI-LIST] Re: Package, pad, bond, and bond wire parasitic capacitence USB 2.0 HS -
» [SI-LIST] Re: Package, pad, bond, and bond wire parasitic capacitence USB 2.0 HS -
» [SI-LIST] run Xilinx Hspice models -
» [SI-LIST] Package, pad, bond, and bond wire parasitic capacitence USB 2.0 HS -
» [SI-LIST] Power Calculations -
» [SI-LIST] Re: Switch on differential lines of ethernet -
» [SI-LIST] Re: Power dissipation- Ambient temperature -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ipradiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Power dissipation- Ambient temperature -
» [SI-LIST] Re: Power dissipation- Ambient temperature -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] FW: Digest Number 1005 -
» [SI-LIST] Power dissipation- Ambient temperature -
» [SI-LIST] Switch on differential lines of ethernet -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ipradiation etc etc -
» [SI-LIST] Re: High sample rate A/D. -
» [SI-LIST] Re: survey of 2D field solvers -
» [SI-LIST] High sample rate A/D. -
» [SI-LIST] Re: Fwd: Re: Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Fwd: Re: Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: [Fwd: Humidity effects on Rogers R3003] -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: A question -
» [SI-LIST] carbon fiber pre-preg characteristics? -
» [SI-LIST] A question -
» [SI-LIST] Re: On the effect of solder mask on Zo -
» [SI-LIST] Re: [Fwd: Humidity effects on Rogers R3003] -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: On the effect of solder mask on Zo - Update -
» [SI-LIST] Re: On the effect of solder mask on Zo -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: On the effect of solder mask on Zo -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance andu-str ipradiation etc etc -
» [SI-LIST] Re: Best PDS impedance for package damping -
» [SI-LIST] Re: On the effect of solder mask on Zo - Update -
» [SI-LIST] Best PDS impedance for package damping -
» [SI-LIST] Re: On the effect of solder mask on Zo -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: survey of 2D field solvers -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] On the effect of solder mask on Zo -
» [SI-LIST] Agenda, European IBIS Summit at DATe 2004 , February the 20th 2004 -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Old Anritsu spectrum analyzer -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: survey of 2D field solvers -
» [SI-LIST] survey of 2D field solvers -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction,plane resonance and u-strip radiation etc etc -
» [SI-LIST] Looking for SI job -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-str ip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: TMDS routing through multiplexer -
» [SI-LIST] Re: ibis check output errors -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip r adiation etc etc -
» [SI-LIST] Re: Transformer Spice Model -
» [SI-LIST] TMDS routing through multiplexer -
» [SI-LIST] Re: Please tell me your birthday -
» [SI-LIST] Re: ibis check output errors -
» [SI-LIST] Re: Please tell me your birthday -
» [SI-LIST] Re: Please tell me your birthday -
» [SI-LIST] Re: pre-emphasis -
» [SI-LIST] Re: Transformer Spice Model -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: pre-emphasis -
» [SI-LIST] Re: Please tell me your birthday -
» [SI-LIST] Re: pre-emphasis -
» [SI-LIST] Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Please tell me your birthday -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] pre-emphasis -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: IBIS QUALITY -
» [SI-LIST] IBIS QUALITY -
» [SI-LIST] Re: 2-port VNA -> 4-port VNA ? -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Fwd: RE: Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: ibis check output errors -
» [SI-LIST] Re: ibis check output errors -
» [SI-LIST] ibis check output errors -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: FCC aproval -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: FCC aproval -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: FCC approval -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] LCD Panels - EMC and Shock Mounting -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Industrial Temp FCRAMs (266MHz, CL = 5) and DDRs (266MHz) -
» [SI-LIST] FCC aproval -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Resent : Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: [Fwd: Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc] -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-s trip radiation etc etc -
» [SI-LIST] [Fwd: Re: Stack up for EMI reduction,plane resonance and u-s trip radiation etc etc] -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: How to select inductor or bead? -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Injected Crosstalk -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Timing analysis -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Please check this spec. sheet! -
» [SI-LIST] Please check this spec. sheet. -
» [SI-LIST] Fw: 答复: How to select inductor orbead? -
» [SI-LIST] 答复: How to select inductor or bead? -
» [SI-LIST] 答复: How to select inductor or bead? -
» [SI-LIST] How to select inductor or bead? -
» [SI-LIST] Re: Node -1 in SPICE -
» [SI-LIST] Re: Node -1 in SPICE -
» [SI-LIST] Re: IBIS model -
» [SI-LIST] Re: Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Hysteresis in SI (Signal Integrity)?? -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: Consideration for SSO with transmission line effect -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Node -1 in SPICE -
» [SI-LIST] Re: confusing emissions and immunity -
» [SI-LIST] confusing emissions and immunity -
» [SI-LIST] Consideration for SSO with transmission line effect -
» [SI-LIST] Re: IIP3 analysis with netlists having nport statements -
» [SI-LIST] Re: Emission -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: IIP3 analysis with netlists having nport statements -
» [SI-LIST] Re: SIAuditor -
» [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - Final Call for Participation+Draft Agenda -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: New Books -
» [SI-LIST] Re: Emission -
» [SI-LIST] Re: Emission -
» [SI-LIST] IBIS model -
» [SI-LIST] ground bounce -
» [SI-LIST] Re: Emission -
» [SI-LIST] Re: Emission -
» [SI-LIST] Emission -
» [SI-LIST] wants fastcap program -
» [SI-LIST] test -
» [SI-LIST] Re: Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] SI Employment Opportunity -
» [SI-LIST] IIP3 analysis with netlists having nport statements -
» [SI-LIST] Re: 2-port VNA -> 4-port VNA ? -
» [SI-LIST] Re: Socket Material -
» [SI-LIST] Socket Material -
» [SI-LIST] Invitation for workshop on "Parallel Optical Interconnects Inside Electronic Systems" -
» [SI-LIST] Re: 2-port VNA -> 4-port VNA ? -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] 1 mm BGA and two traces between balls -
» [SI-LIST] Cost of Performance of Micro Vias -
» [SI-LIST] SIAuditor -
» [SI-LIST] Re: ESD structure for an inverter -
» [SI-LIST] 2-port VNA -> 4-port VNA ? -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] HI -
» [SI-LIST] Re: ESD structure for an inverter -
» [SI-LIST] Career Opportunity: Bose Corporation Position for a Failure Analysis Engineer -
» [SI-LIST] Re: Stack up for EMI reduction -
» [SI-LIST] Re: Questions on PLL response -
» [SI-LIST] Questions on PLL response -
» [SI-LIST] Re: ESD solution on antenna output (re-send) -
» [SI-LIST] Re: ESD solution on antenna output (re-send) -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] What is High K ceramic capacitors? -
» [SI-LIST] ESD structure for an inverter -
» [SI-LIST] Re: Need Hard drive that works up to 65 deg ? -
» [SI-LIST] Re: Need Hard drive that works up to 65 deg ? -
» [SI-LIST] Re: Need Hard drive that works up to 65 deg ? -
» [SI-LIST] Re: Need Hard drive that works up to 65 deg ? -
» [SI-LIST] [Fwd: Humidity effects on Rogers R3003] -
» [SI-LIST] Re: ESD solution on antenna output (re-send) -
» [SI-LIST] Re: Stack up for EMI reduction -
» [SI-LIST] Re: ESD solution on antenna output (re-send) -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Need Hard drive that works up to 65 deg ? -
» [SI-LIST] trace characteristic impedance -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Seeking SI Eng. for 6-12 month project - NC -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Stack up for EMI reduction, plane resonance and u-strip radiation etc etc -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: ESD solution on antenna output -
» [SI-LIST] Re: Stack up for EMI reduction -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] ESD solution on antenna output -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Stack up for EMI reduction -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Buried uStrip question -
» [SI-LIST] Buried uStrip question -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: SMD capacitor question -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -
» [SI-LIST] Re: Traces don't cause EMI - really? -