[SI-LIST] Re: Middle (Star) Termination
- From: "Tom Biggs" <tbiggs@xxxxxxxxxxxxxxxxxxxxx>
- To: "si list" <si-list@xxxxxxxxxxxxx>
- Date: Fri, 27 Feb 2004 10:48:15 -0800
Is this the same 'star' routing used in VME320 backplanes? It supposedly
allows the old VME bus to run at 8x the normal speed. This is also
patented, but I'm not sure there are any series termination resistors.
-tom
-----Original Message-----
From: steve weir [mailto:weirsp@xxxxxxxxxx]=20
Sent: Thursday, February 26, 2004 6:22 PM
To: George Tang; dbostan@xxxxxxxxx
Cc: si list
Subject: [SI-LIST] Re: Middle (Star) Termination
George, agreed, what I saw in Scott's original description appeared to
me=20
to just be one driver such as a clock driver sourcing multiple loads, so
no=20
big deal. The idea of attenuating "excess" signal with resistors in the
middle of the glob doesn't seem very appealing to me. It seems like a=20
band-aid to put on lousy signaling methods and creates a lot of routes
that=20
are unnecessary with a well designed parallel terminated scheme.
Regards,
Steve.
At 12:41 PM 2/26/2004 -0800, George Tang wrote:
>Routing density is always an issue. Please imagine that you have a 64=20
>bit bi-directional bus connecting 6 devices together, and each device=20
>is a high pin count BGA, so you can only route ONE trace between the=20
>balls of the BGA. With the star configuration, you will need to route=20
>64 x 6 traces. Please assume that making a 20 or 30 layer board is out
>of the question.
>
>The 5pF capacitance is the receiver buffer input capacitance, so you=20
>need to drive that no matter what configuration you use, but the more=20
>traces you connect in parallel, the less current going into each=20
>receiver load. I don't want to give away too much, but you can try=20
>this yourself.
>
>The 'STAR' configuration for bus routing is patented. If you use it=20
>without permission, you risk your company being taken to court by the=20
>patent holder. To some, that's a risk that they would like to avoid.
>
>George
>
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx=20
>[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of steve weir
>Sent: Wednesday, February 25, 2004 11:31 PM
>To: gtang@xxxxxxxx; dbostan@xxxxxxxxx
>Cc: si list
>Subject: [SI-LIST] Re: Middle (Star) Termination
>
>
>George,
>
>1) I have never found routing density to be an issue. But with better=20
>and cheaper drivers, the star gets less use these days than it used to.
>
>2) 5pf looking into 50 ohms of a series terminated source will always=20
>be slower than looking into 25 ohms parallel termination. I don't see=20
>where the number of loads that the source drives, assuming it is=20
>matched is visible at the far end of the transmission line.
>
>3) Did the PTO approve a patent on a signal source with multiple loads?
>I would like to see someone try and enforce such a patent. I think=20
>that is silly as the Palm space multiplexer patent that is drawing=20
>howls of laughter.
>
>Regards,
>
>Steve.
>At 10:17 PM 2/25/2004 -0800, George Tang wrote:
> >The down side to the star termination is shown below:
> >
> >1. The trace routing density increases drastically, since you need to
> >route a separate trace from the (electrical) center point to each=20
> >load. 2. This works well for the ideal case when the loads behave as=20
> >open circuits. But if the load capacitance is 4 or 5pF and the=20
> >driver puts out
>a
> >sub-nanosecond rise time, the wave form at the receiver will have a=20
> >significantly slower rise-time. 3. The star termination is patented,=20
> >so you may need to pay a fee to use
>it.
> >
> >With some clever engineering, you might be able to come up with a=20
> >custom
>bus
> >design that eliminates the above problems.
> >
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx=20
> >[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Dan Bostan
> >Sent: Wednesday, February 25, 2004 1:50 PM
> >To: Scott.Newton@xxxxxxxxxxxxxxxx; Robert Haller
> >Cc: si list
> >Subject: [SI-LIST] Re: Middle (Star) Termination
> >
> >
> >I think this termination technique is well explained
> >in the Motorola data sheet for clock drivers driving multiple loads.
> >/dan
> >
> >--- "Newton, Scott" <Scott.Newton@xxxxxxxxxxxxxxxx>
> >wrote:
> > > All,
> > >
> > > I haven't found the paper yet, but I've realized how
> > > the star =3D
> > > termination works, at least at a high level.=3D20
> > > If anyone is interested, here is a summary:=3D20
> > > Resistors with identical values are connected at the junction of=20
> > > the =3D star. The value is calculated such that the resistor
> > > of the driven leg =3D
> > > plus the parallel combination of the resistors in
> > > the undriven legs plus =3D
> > > the parallel combination of the impedances of the
> > > undriven leg traces =3D
> > > EQUAL the impedance of the driven leg trace. The
> > > resistor value is =3D
> > > calculated as (N-2/N)Zo where N is the number of
> > > legs in the star and Zo =3D
> > > is the characteristic trace impedance. The
> > > equivalent circuit yields a =3D
> > > matched impedance (almost) on the driven leg to the
> > > parallel =3D
> > > combinations of all of the undriven legs/resistors.
> > > A half wave is =3D
> > > propagated at the driven resistor (side closest to
> > > the driver). When the =3D
> > > wave hits the receivers, it doubles as it reflects
> > > (off of infinite =3D
> > > impedance juncture). The reflected wave propagates
> > > back to the driver =3D
> > > leg which looks almost like an infinite length
> > > matched impedance, so =3D
> > > very little reflection occurs. There are of course
> > > details such as the =3D
> > > output impedance of the driver, etc that are not
> > > covered in this =3D
> > > summary.
> > >
> > > Scott
> > >
> > >
> > > -----Original Message-----
> > > From: Robert Haller [mailto:rhaller@xxxxxxxxxx]
> > > Sent: Wednesday, February 25, 2004 12:54 PM
> > > To: Newton, Scott
> > > Cc: si list
> > > Subject: Re: [SI-LIST] Middle (Star) Termination
> > >
> > > Scott,
> > > John Grebenkemper wrote an excellent paper
> > > that is available in =3D
> > > the
> > > Designcon98 precedings "Network Topology Analysis
> > > Using The Reflection
> > > Coefficient" that does and excellent job of not only explaining=20
> > > the theory of middle termination but also presents the
> > > math.
> > >
> > > Regards
> > > Bob
> > >
> > > Newton, Scott wrote:
> > > > Can anyone please provide a brief explanation
> > > regarding the theory of =3D
> > > a middle termination scheme?
> > > > In the book" High Speed Digital Design" by
> > > Johnson&Graham the topic =3D
> > > seems to be glossed over. It essentially says that providing=20
> > > resistors =3D connected in the middle of a star network that have
> > > impedance of 1/3 Zo =3D
> > > work by halving the voltage at the node. I've used
> > > Hyperlynx to simulate =3D
> > > this arrangement and it works well. I've searched
> > > the web and haven't =3D
> > > found a satisfactory explanation.
> > > >=3D20
> > > > Thanks in advance.
> > > >
> > >
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