[SI-LIST] Re: ESD solution on antenna output

  • From: "Steve Rogers" <SRogers@xxxxxxxxxxxxx>
  • To: <Ibarrett@xxxxxxxxxxxxxx>, <davidjp@xxxxxxxxxxx>,<si-list@xxxxxxxxxxxxx>, <Pommerenke@xxxxxxxxxxx>
  • Date: Tue, 3 Feb 2004 09:09:23 -0000

Some questions and comments...

1. Can you be more specific as to you ESD problem. Is is causing =
permenant degradation/death of a part on the radio? My guess is that =
your frying your PA transistor due to exceeding the  collector-emitter =
or drain-source breakdown voltage.

2. I don't know where this suggestion of a shunt inductor to ground =
originates but this won't help and will in fact make things worse. At =
very high frequencies this will have large reactance and most of the ESD =
voltage will be developed across it. If you are going to try to get away =
with no ESD protection you want to run an output match with some series =
inductance not shunt. A match with some form of L-C filter looking from =
the antenna back to the transistor is good (hopefully this is obvious). =
A nice match is the 'T' type this gives you two inductances in the =
series path. Of course the match you can use depends on the frequency of =
operation and the power level of your transmitter (for transmitters) and =
maybe a bit dependant on the type of transistor. You could end up with =
all your possible match networks having no series inductance.

3. You dont need to worry about pushing the ESD into your ground plane. =
This is fine, you just need to make sure you dont let it generate a =
whopping voltage across the output transistor or any other susceptible =
part.=20

4. You have not mentioned the operating frequency of the radio bit? If =
its running at VHF you will have a reasonable choice of ESD suppression =
parts. Once you get up to mid UHF and more the parasitic capacitance of =
any ESD part you use must be considered. There are parts though such as =
the AVX antenna guard. These come in a number of sizes with cap down to =
as low as 3pF. If the cap needs to be lower you can run with low cap =
diodes such as those suggested in other posts.=20

5. Although the correct place to put your ESD suppressor is right on the =
antenna port, you could get away with placing it anywhere from there =
back to directly across the transistor. This gives you some freedom for =
layout and more importantly impedance matching because whatever you use =
needs to drop into your match network without pouring all your RF power =
away and causing other nasty problems.=20

6. Your radio may have antenna switching and other fancy bits after the =
final amplifier stage. If this is the case then your protection needs to =
be upstream of this.=20

7. The receiver input also needs to be afforded the same protection.=20

8. Remember to do your sums when you pick ESD bits. Before you hit your =
impedance match you can have very large voltage swings on the =
collector/drain of your output transistor. For example a typical class C =
amplifier will have collector voltage swings of twice the DC rail. If =
the design has some harmonic termination or runs class E etc then you =
can have even larger voltage swings.=20

9. Many ESD supression devices have terrible tolerance on their stray =
capacitance. You need to consider this in your design or you will end up =
with an untuned radio.

10. Finally, check out these places:

(a) Microsemi]
(b) Texas Inst
(c) California Micro devices
(d) AVX

ENJOY=20

Steve Rogers B.Eng (Hons) C.Eng IEE
RF Design Engineer

Micromill Electronics Limited
Leydene House
Waterberry Drive=20
Waterlooville Hampshire
PO7 7XX

Tel: +44 (0) 23 9236 6600
Fax: +44 (0) 23 9236 6673

Registered No. 1456922 (England). =20
Registered Office Brook Road
Wimborne, Dorset BH21 2BJ

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-----Original Message-----
From: Ian Barrett [mailto:Ibarrett@xxxxxxxxxxxxxx]
Sent: Monday, February 02, 2004 6:41 PM
To: 'davidjp@xxxxxxxxxxx'; si-list@xxxxxxxxxxxxx;
'Pommerenke@xxxxxxxxxxx'
Subject: [SI-LIST] ESD solution on antenna output


I am currently having a lively discussion with a colleague about an ESD
problem we have encountered. The trouble is I don't think either of us =
know
enough to be able to convince the other of our point of view.

The product is a small radio transmitter that is very susceptible to an =
ESD
spike applied directly to it's antenna. The design includes a small =
inductor
between the antenna output and ground. My colleague (the designer) put =
it
there to try and alleviate any potential ESD problems. I have found that =
I
cannot solve the ESD susceptibility problem without removing it.

He claims 'any ESD experts will tell you to place this inductor' and =
wants
me to try and find another solution to the problem. But I think the =
inductor
is making the situation worse by coupling the ESD spike onto the ground
plane.

Can anyone offer some theory to back up either argument?

Ian.
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