[SI-LIST] Signal Integrity Opening at Intel, Oregon
- From: "Gardiner, Scott" <scott.gardiner@xxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 27 Feb 2004 15:23:03 -0800
SI-List members:
My team has an immediate opening for an experienced Signal =
Integrity/Validation Engineer at Intel Corporation in Hillsboro, Oregon.
Position would include work designing, simulating and validating next =
generation I/O interconnects, requiring the standard experience with =
various simulation tools (HSPICE, Ansoft, etc.) and lab validation (High =
Speed Scopes, TDR, VNA,etc.) environments.
=20
The formal job posting/qualifications can be found at: =
http://appzone.intel.com/jobs/uRequisition.asp?Posting=3D33446 =20
(Note that the current Req posted by HR is slightly outdated in that it =
stresses the validation aspect more than signal integrity design; =
there's actually a strong desire to have a signal integrity engineer who =
would be able to assist with lab validation/correlation of signal =
integrity issues).
Interested candidates may reply directly to myself or the hiring manager =
(make sure you don't reply to the entire SI-LIST, of course!) at:=20
scott.gardiner@xxxxxxxxx or cliff.lee@xxxxxxxxx
=20
Thanks for your interest!
Scott Gardiner=20
Intel Corp.
Hillsboro-Portland, OR
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