[SI-LIST] Re: Consideration for SSO with transmission line effect
- From: "Steven M. Waldstein" <swldstn@xxxxxxxxxxxx>
- To: <ehsu@xxxxxxxxxxxxxxxxx>,"Si-List (E-mail)" <si-list@xxxxxxxxxxxxx>
- Date: Mon, 9 Feb 2004 21:59:41 -0500
Eric,
When doing SSO simulations with a transmission line make sure
you keep the following in mind.
a) Include any internal package coupling between adjacent pins
that will cause cross-talk.
b) Include any cross-talk at the board level as well.
c) Account for transmission line lengths and loads so that
reflections are accounted for
because you will be surprised how the SSO noise couples onto a
quite high or low at the source and how this "glitch" gets doubled
at the far end as it hits the unterminated open circuit.
Thus glitches of > 500 mV can end up potentially being seen at the
far end when the get > 1V. Of course this depends on the logic families
you are using but this is typical for 3.3V LVTTL or LVCMOS.
It can be especially bad for large BGAs that use wire bond assembly where
the internal cross talk plus SSO ground bounce will add up to produce
a very nice glitch. In these cases I've seen ground bounce of 300-400 mV
added with cross-talk of the same order of magnitude which shows up at
high as 1.2 - 1.4 at the far end when it doubles.
Of course if the "quiet" signal is something like a clock or interrupt or
other async signal this could cause you real problems.
Steve
swldstn@xxxxxxxxxxxx
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Eric Hsu
Sent: Monday, February 09, 2004 5:05 PM
To: Si-List (E-mail)
Cc: Frank Dunlap
Subject: [SI-LIST] Consideration for SSO with transmission line effect
Hi expert,
I'm trying to quantify the amount of SSO noise which is contributed by
IO buffer with signal transmission line. Is it really matter or not to =
consider for different transmission line length? In case, there is an =
un-terminated topology, you may get different reflection noise due to =
different transmission line length, then it may also change the di/dt on =
the buffer.
Best Regards,
Eric Hsu
Interface Technologies
NetLogic Microsystems, Inc.
450 National Ave.
Mountain View, CA 94043
650-961-6676 x198
This e-mail contains NetLogic Microsystems, Inc. Confidential =
information
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