Posts for si-list, 12-2003

Browse: Last Month: 11-2003 Main Archive Page Next Month: 01-2004

» [SI-LIST] Re: Chassis and Digital grounds connection -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: Chassis and Digital grounds connection -
» [SI-LIST] Re: Chassis and Digital grounds connection -
» [SI-LIST] HAPPY NEW YEAR -
» [SI-LIST] Re: 48V filtering -
» [SI-LIST] Chassis and Digital grounds connection -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] 48V filtering -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: Bypass Capacitor Selection -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Bypass Capacitor Selection -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: differential line -
» [SI-LIST] Re: differential line -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] request form -
» [SI-LIST] differential line -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] IBIS Model Parasitic -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Re: Approx. value of board and socket capacitance -
» [SI-LIST] SCR reliability criteria -
» [SI-LIST] Re: Approx. value of board and socket capacitance -
» [SI-LIST] Re: Approx. value of board and socket capacitance -
» [SI-LIST] Approx. value of board and socket capacitance -
» [SI-LIST] Re: RESEND: Stitching CAPs between DDR VDD and VTT Power Rails -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] Sam Turner/AALC/AlcatelAustralia is out of the office. -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] RESEND: Stitching CAPs between DDR VDD and VTT Power Rails -
» [SI-LIST] Re: 0.8mm BGA routing -
» [SI-LIST] 0.8mm BGA routing -
» [SI-LIST] Re: problems about 1-to-2 FE connection -
» [SI-LIST] Re: problems about 1-to-2 FE connection -
» [SI-LIST] problems about 1-to-2 FE connection -
» [SI-LIST] Merry Christmas to one and all!! -
» [SI-LIST] REPOST: Optimization in Hspice -
» [SI-LIST] Re: : hspice field solver question -
» [SI-LIST] Problem in FE connection -
» [SI-LIST] Re: hi,I am a new entry,azam(suggestions Please) -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] PWL(1) within HSPICE -
» [SI-LIST] : hspice field solver question -
» [SI-LIST] CORRECTION re: Spice PULSE parameters (was: hspice field solver question) -
» [SI-LIST] Re: hspice field solver question -
» [SI-LIST] Latch-type sense amplifier -
» [SI-LIST] Re: Spice PULSE parameters (was: hspice field solver question) -
» [SI-LIST] Re: hspice field solver question -
» [SI-LIST] hi,I am a new entry,azam(suggestions Please) -
» [SI-LIST] hspice field solver question -
» [SI-LIST] unsubscribe -
» [SI-LIST] Re: Stitching CAPs between DDR VDD and VTT Power Rails -
» [SI-LIST] Re: unsubscribe -
» [SI-LIST] unsubscribe -
» [SI-LIST] Re: [Fwd: Optimization in Hspice] -
» [SI-LIST] test for coax cable -
» [SI-LIST] unsubscribe -
» [SI-LIST] Re: Differences between HFSS Simulation Result and Agilent's ADS Momentum -
» [SI-LIST] 'unsubscribe' -
» [SI-LIST] 'unsubscribe' -
» [SI-LIST] unsubscribe -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Re: Stitching CAPs between DDR VDD and VTT Power Rails -
» [SI-LIST] Stitching CAPs between DDR VDD and VTT Power Rails -
» [SI-LIST] PREVENTING EMISSIONS IN USB SYSTEM -
» [SI-LIST] lossy dielectrics and causality -
» [SI-LIST] unsubscribe -
» [SI-LIST] unsubscribe -
» [SI-LIST] Re: Looking for UL Specs -
» [SI-LIST] Re: High frequency transmission -
» [SI-LIST] Re: Looking for UL Specs -
» [SI-LIST] Re: Looking for UL Specs -
» [SI-LIST] Re: High frequency transmission -
» [SI-LIST] Re: Differences between HFSS Simulation Result and Agilent's ADS Momentum -
» [SI-LIST] -
» [SI-LIST] Re: Via on Pad -
» [SI-LIST] speaking of usb -
» [SI-LIST] Re: Via on Pad -
» [SI-LIST] Re: Tell me about USB ? -
» [SI-LIST] Re: Tell me about USB ? -
» [SI-LIST] Re: Tell me about USB ? -
» [SI-LIST] Re: TI-Spice -
» [SI-LIST] Re: TI-Spice -
» [SI-LIST] Re: Tell me about USB ? -
» [SI-LIST] Tell me about USB ? -
» [SI-LIST] Re: Via on Pad -
» [SI-LIST] Differences between HFSS Simulation Result and Agilent's ADS Momentum -
» [SI-LIST] High frequency transmission -
» [SI-LIST] Via on Pad -
» [SI-LIST] Re: Different types of Critical Net Shilding -
» [SI-LIST] Re: Info on Spice package -
» [SI-LIST] Re: Info on Spice package -
» [SI-LIST] Re: Common mode chokes -
» [SI-LIST] Email change, IBIS Summit at DesignCon -
» [SI-LIST] Info on Spice package -
» [SI-LIST] TI-Spice -
» [SI-LIST] Re: Different types of Critical Net Shilding -
» [SI-LIST] Re: How they measure true RMS -
» [SI-LIST] Re: Different types of Critical Net Shilding -
» [SI-LIST] Re: How they measure true RMS -
» [SI-LIST] Re: How they measure true RMS -
» [SI-LIST] Re: RBSOA -
» [SI-LIST] RBSOA -
» [SI-LIST] RMCEMC December slides available for download -
» [SI-LIST] RMCEMC Presentation slides available -
» [SI-LIST] Different types of Critical Net Shilding -
» [SI-LIST] Re: Surface Mount resistor for high frequency -
» [SI-LIST] Surface Mount resistor for high frequency -
» [SI-LIST] Re: Common mode chokes - SPICE-Models -
» [SI-LIST] Common mode chokes -
» [SI-LIST] Re: RBSOA of Transistor -
» [SI-LIST] RBSOA of Transistor -
» [SI-LIST] Common mode chokes - SPICE-Models -
» [SI-LIST] Re: impedance for 10-mile pipe at 120Hz, skin effect -
» [SI-LIST] Waveform analysis -
» [SI-LIST] Re: How they measure true RMS -
» [SI-LIST] How they measure true RMS -
» [SI-LIST] IBIS 4.0 parser (ibischk4) on-line! -
» [SI-LIST] [OT] Offshore engineering (beating a dead horse) -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: cpw impedance -
» [SI-LIST] Re: IBIS models - What is the difference between Tri-Out & Tri-In -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] cpw impedance -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - Second Announcement & Call for Participation+Presentations -
» [SI-LIST] The latest research progress about signal integrity -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Re: impedance for 10-mile pipe at 120Hz, skin effect -
» [SI-LIST] Re: Fw: 5V To 3V -
» [SI-LIST] Fw: 5V To 3V -
» [SI-LIST] Re: IBIS models - What is the difference between Tri-Out & Tri-In -
» [SI-LIST] IBIS models - What is the difference between Tri-Out & Tri-In -
» [SI-LIST] Re: impedance for 10-mile pipe at 120Hz, skin effect -
» [SI-LIST] Second Call for Papers for IBIS Summit at DesignCon -
» [SI-LIST] Re: How to reduce the impedance? -
» [SI-LIST] Re: Enquiry on using Polyline to draw the CPW CopperTrace using HFSS -
» [SI-LIST] impedance for 10-mile pipe at 120Hz, skin effect -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] extracting capacitance from mems -
» [SI-LIST] Re: waveform analysis -
» [SI-LIST] Re: Power integrity / Transient current in Target impedance -
» [SI-LIST] Re: How to reduce the impedance? -
» [SI-LIST] Re: waveform analysis -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] waveform analysis -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Enquiry on using Polyline to draw the CPW Copper Trace using HFSS -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] How to reduce the impedance? -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Coaxial TEM Cutoff Frequency -
» [SI-LIST] Job Opening at Ansoft -
» [SI-LIST] Coaxial TEM Cutoff Frequency -
» [SI-LIST] Re: Ansoft Q2D and Swept Impedance Parameters -
» [SI-LIST] Re: Ansoft Q2D and Swept Impedance Parameters -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] Re: Power integrity / Transient current in Target impedance -
» [SI-LIST] Re: Power integrity / Transient current in Target impedance -
» [SI-LIST] Ansoft Q2D and Swept Impedance Parameters -
» [SI-LIST] Re: Power integrity / Transient current in Target impedance -
» [SI-LIST] Re: Hspice questions -
» [SI-LIST] Re: Power integrity / Transient current in Target impedance -
» [SI-LIST] Hspice questions -
» [SI-LIST] Power integrity / Transient current in Target impedance -
» [SI-LIST] Re: VTT for ECL -
» [SI-LIST] Checking mail (Null) -
» [SI-LIST] PWM noise current troubleshooting -
» [SI-LIST] nonlinear in power ground noise of clock driver(which kind of mistakeI have maken) -
» [SI-LIST] Return Current -
» [SI-LIST] Re: I have a question related package parasitic extraction -
» [SI-LIST] Can anybody help me out?! about the quality factor of inductor -
» [SI-LIST] Re: Si design -
» [SI-LIST] Re: I have a question related package parasitic extraction -
» [SI-LIST] Re: I have a question related package parasiticextraction -
» [SI-LIST] Re: I have a question related package parasiticextraction -
» [SI-LIST] Meeting Tonight! SCVEMC, Santa Clara, CA -
» [SI-LIST] HSpice / IBIS -
» [SI-LIST] Re: I have a question related package parasitic extraction -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] VTT for ECL -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] nonlinear in power ground noise of clock driver(which kind of mistakeI have maken) -
» [SI-LIST] Return Current -
» [SI-LIST] Re: si design -
» [SI-LIST] Re: I have a question related package parasiticextraction. -
» [SI-LIST] Re: I have a question related package parasiticextraction. -
» [SI-LIST] Re: s parameters and transient simulation -
» [SI-LIST] I have a question related package parasitic extraction. -
» [SI-LIST] s parameters and transient simulation -
» [SI-LIST] HFSS Simulations -
» [SI-LIST] mahamud khandokar's resume -
» [SI-LIST] Looking for a job -
» [SI-LIST] Hello -
» [SI-LIST] EFTB filetr -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] HFSS Feeding -
» [SI-LIST] HFSS Feeding the patch -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Spice modeling of ferrite beads/inductors -
» [SI-LIST] Re: Modeling and measurement of power distribution system -
» [SI-LIST] Re: return path -
» [SI-LIST] Re: return path -
» [SI-LIST] return path -
» [SI-LIST] Urgent: IBIS Summit at DesignCon -
» [SI-LIST] Re: urgent: LPC to RS232 converter -
» [SI-LIST] Re: Modeling and measurement of power distribution system -
» [SI-LIST] Re: Modeling and measurement of power distribution system -
» [SI-LIST] Re: Modeling and measurement of power distribution system -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Modeling and measurement of power distribution system -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] spice modeling of ferrite components -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] s2ibis3 -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] one questin about Vih,Vil,choose 0.5Vcc or 0.6Vcc or 2.0? little confused! -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: flight time and propagation delay in Hspice -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: flight time and propagation delay in Hspice -
» [SI-LIST] Re: flight time and propagation delay in Hspice -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: Signals crossing power plane split -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: nonlinear in power ground noise of clock driver -
» [SI-LIST] nonlinear in power ground noise of clock driver -
» [SI-LIST] Re: IPC standards -
» [SI-LIST] IPC standards -
» [SI-LIST] Re: Urgent: LPC to RS232 Convertor -
» [SI-LIST] Re: Urgent: LPC to RS232 Convertor -
» [SI-LIST] Re: Bit OT: Coax Recommendations -
» [SI-LIST] Re: Signals crossing power plane split -
» [SI-LIST] Signals crossing power plane split -
» [SI-LIST] Urgent: LPC to RS232 Convertor -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: flight time and propagation delay in Hspice -
» [SI-LIST] Re: SPICE or IBIS -
» [SI-LIST] Re: Bit OT: Coax Recommendations -
» [SI-LIST] SPICE or IBIS -
» [SI-LIST] First Call for Papers for the IBIS Summit at DesignCon -
» [SI-LIST] Re: Stripline vs. Parallel Plate Impedances -
» [SI-LIST] Re: flight time and propagation delay in Hspice -
» [SI-LIST] Crystal Oscillator i/p & o/p nodes -
» [SI-LIST] Re: state machine -
» [SI-LIST] state machine -
» [SI-LIST] Designing a breakout board for high speed boards -
» [SI-LIST] [LISTS] ENERGY METERS -
» [SI-LIST] ENERGY METERS -
» [SI-LIST] flight time and propagation delay in Hspice -
» [SI-LIST] Re: XTK simulation -
» [SI-LIST] Re: Bit OT: Coax Recommendations -
» [SI-LIST] Bit OT: Coax Recommendations -
» [SI-LIST] Wave pipelining -
» [SI-LIST] Re: Dielectric constant for FR4 at above 1Ghz frequency -
» [SI-LIST] Re: Dielectric constant for FR4 at above 1Ghz frequency -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] Re: Dual stripline orthogonal design rule -
» [SI-LIST] Re: How frequency effects L, C & Z -
» [SI-LIST] Re: DDR propagation delay and packaging -
» [SI-LIST] Dual stripline orthogonal design rule -
» [SI-LIST] Fw: 1N 4148 diode -
» [SI-LIST] 1N 4148 diode -
» [SI-LIST] Recall: About the position of capacitors -
» [SI-LIST] 2N 3019 PSPICE model -
» [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - First Announcement & Call for Participation+Presentations (resend due to a typo in location) -
» [SI-LIST] E U R O P E A N I B I S S U M M I T M E E T I N G 2004 - First Announcement & Call for Participation+Presentations -
» [SI-LIST] Re: Transmission Lines Information -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] About the position of capacitors -
» [SI-LIST] Re: DDR propagation delay and packaging -
» [SI-LIST] Stripline vs. Parallel Plate Impedances -
» [SI-LIST] Re: Hspice Fieldsolver Question -
» [SI-LIST] DDR propagation delay and packaging -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] Re: Dielectric Constant - thin materials - DC to 10GHz -
» [SI-LIST] Re: Dielectric constant for FR4 at above 1Ghz frequency -
» [SI-LIST] Re: How frequency effects L, C & Z -
» [SI-LIST] XTK simulation -
» [SI-LIST] How frequency effects L, C & Z -