[SI-LIST] Re: Via on Pad
- From: Ahmad Fallah <emcesd2000@xxxxxxxxx>
- To: msalami@xxxxxxxxxx,'Signal Integrity List' <si-list@xxxxxxxxxxxxx>
- Date: Thu, 18 Dec 2003 06:46:07 -0800 (PST)
Hello Mehrdad,
Placing the via in the pad makes for much smaller loop area when connecting the
decoupling caps to their relevant power plane/device. SMT process engineers do
not like this, since it traps flux under the device terminals. To avoid
reliability issues due to this flux entrapment, the PCB manufacturer will need
to plate over the via. This secondary process is done to smoothen over the
concave created by the via in the pad, and adds to the PCB cost.
Ahmad
Mehrdad Salami <msalami@xxxxxxxxxx> wrote:
Hi All,
I just wonder if anybody looked at putting via on pads. For example
putting via under decoupling cap pads to power and ground. What is
advantage and disadvantage of this method in manufacturing and SI.
Regards,
Sal
==========================================
Mehrdad Salami (Ph.D.)
Hardware Design Engineer
Colour Vision Systems
11 - Park St - Bacchus Marsh
Victoria - 3340 - Australia
Tel: +613-5367-6410
Fax: +613-5367-4480
Email: msalami@xxxxxxxxxx
Web: www.cvs.cx
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- References:
- [SI-LIST] Via on Pad
- From: Mehrdad Salami
Other related posts:
- » [SI-LIST] Via on Pad
- » [SI-LIST] Re: Via on Pad
- » [SI-LIST] Re: Via on Pad
- » [SI-LIST] Re: Via on Pad
- [SI-LIST] Via on Pad
- From: Mehrdad Salami