[SI-LIST] Re: Via on Pad

Mehrdad Salami wrote:
> 
> Hi All,
> 
> I just wonder if anybody looked at putting via on pads. For example
> putting via under decoupling cap pads to power and ground. What is
> advantage and disadvantage of this method in manufacturing and SI.

        If through-hole vias are placed on the solder pad they
        will leach the solder during reflow and make a likely
        insufficient solder joint.  This can be compensated for
        to a certain extent by using additional solder paste but
        is not a guaranteed solution.  There is also difficulty
        in inspection of said solder joint, to qualify your re-
        sults may take x-ray work.

        Through-hole vias can be filled with a silver epoxy and
        plated over, which can make this technique robust.

        If the vias are blind or microvias, ie only one or two
        layers deep, you may get away with only causing voiding
        in the joint, which will still take qualification work.
        My suggestion in this case is to stick with a shallow 
        and wide via, and these are best placed at the "toe" of
        the solder joint.  Of course that is the place that does
        the least good from a mounted inductance point of view.

        Be very careful with the suggestion to tent through-vias
        on one side only.  This makes a handy "cup" to hold all
        manner of process chemistry, making an eventual failure
        mechanism.  It can be done in narrow cases where all the
        chemistry is known be rendered benign.
-- 
 
      Jeff Seeger                         Applied CAD Knowledge Inc
      Chief Technical Officer                  Tyngsboro, MA  01879
      jseeger "at" appliedcad "dot" com                978 649 9800
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