[SI-LIST] Re: Bypass Capacitor Selection

How do broadside caps compare with arrays and/or the AVX IDC caps?  How to 
they compare with "normal" caps with multiple vias?

I assume an array gets one via per pad.  (Does it make sense to use more?)

Broadside caps leave more flexibility to the designer.  Let's assume I use 
the same number of vias for the same package size array.  Is that the right 
number?  How do the parts cost compare?  How well does each approach work?

Another topic tangled in this discussion is where the vias are located.    
How do vias next to a pad compare with a via in the pad?  How much do 
vias-in-pads cost relative to vias next to pads?  Does the answer to this 
depend upon what type of cap we are talking about?



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