Hello, The DDR termination power rail should have sinking capability. Normally VTT is generated from the VDD and in switching regulator based solutions the upper FET provides the sinking path from VTT to VDD. With the upper condition met, How does an array of stitching capacitors (several 0.1uf ceramic caps and few larger tantalum caps) between the VDD and VTT helps? Thanking all in advance, Regards, Harjeet. ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu