[SI-LIST] state machine

  • From: Alicia Corrales Chanca <alicor@xxxxxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Wed, 03 Dec 2003 14:43:51 +0100

Hi all

I am working with the program StateCAD of Xilinx, I am trying to
develope a state machine to implement it in a FPGA, I want to use the
internal clock of the FPGA which isasigment to pin 77, I declare a
variable call RELOJ in the state diagram to pin77, but when I compile an
error occur with this pin.

How can I use the clock of the FPGA in the state machine?

Thanyou all.

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