Hi guru, Please reading the following message from intel RDDP(secret?^_^) "The closer to the load the capacitor is placed, the more stray = inductance is bypassed.......Howerver, areas closer to the load have = less room for capacitor placement..." In my impression, many capacitors would be placed near the source = to reduce the noise,and so forth. A problem,generally,which is better to = place the capacitors near the source or near the load? Thanks for your explanations. Best regards, Greg ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu