Posts for si-list, 03-2010

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  1. » [SI-LIST] Re: Kelvin current sense resistor, Heyfitch
  2. » [SI-LIST] Re: DDR3 Slew Rate derating., QU Perry
  3. » [SI-LIST] Outer Shield of coaxial cable, Neo
  4. » [SI-LIST] Simulating SI and PI through a "passive" backplane, Cuong P Nguyen
  5. » [SI-LIST] Simulating FR4 trace with frequency dependent Er, Neo
  6. » [SI-LIST] UCLA Ext. on-line course: Noise Coupling and Power Integrity, Cosmin Iorga
  7. » [SI-LIST] Re: Simulating FR4 trace with frequency dependent Er, Neo
  8. » [SI-LIST] Signal integrity opening in 3PAR Inc, Chris Cheng
  9. » [SI-LIST] Signal Integrity Opening at Cisco Systems, Inc., LuisSergio Boluna (lboluna)
  10. » [SI-LIST] RF Board - Query, Ritesh @ Reliant EDS
  11. » [SI-LIST] Re: RF Board - Query, o. laney
  12. » [SI-LIST] Re: Op-Amp, o. laney
  13. » [SI-LIST] Call for Papers - Agilent ADS Signal Integrity Users Group - Andover MA - May 12th, colin_warwick
  14. » [SI-LIST] Query about Hyperlynx tool, chundi srikanth
  15. » [SI-LIST] Serial IO Books, Avtaar Singh
  16. » [SI-LIST] Time domain modeling of non linear device, Eric Monteiro
  17. » [SI-LIST] Eye Mask Setup in Agilent DSO81204B, Sumathi Kuppuswamy
  18. » [SI-LIST] Using standard scope and single ended pulse to estimate differential impedance, alfred1520list
  19. » [SI-LIST] Interpreting s-params to physical voltage levels., Lakshmi N. Sundararajan - PTU
  20. » [SI-LIST] frquency limit of a channel, Lakshmi N. Sundararajan - PTU
  21. » [SI-LIST] Re: frquency limit of a channel, Joshua Kim
  22. » [SI-LIST] Damping board resonances using discrete resistors - frequency domain data, Doug Smith
  23. » [SI-LIST] Convert E1/T1 diff-signal to single_end for backplane, Zaiyi Liao
  24. » [SI-LIST] Antipad dimensions, Karthik Raj Guruchandran
  25. » [SI-LIST] Upcoming Free Webinar on IBIS Model Quality, Timothy Coyle
  26. » [SI-LIST] About High Speed Signal Simulation, rongsheng_yuan
  27. » [SI-LIST] DDR3 VTT Regulator, Praveen Jose
  28. » [SI-LIST] Reg. EMI/EMC problem.., chundi srikanth
  29. » [SI-LIST] PCI Express AC Coupling, Chris Johnson
  30. » [SI-LIST] Target impedance for power plane, Lakshmi N. Sundararajan - PTU
  31. » [SI-LIST] DDR-2 address Termination Topology, Ragesh
  32. » [SI-LIST] Re: Kramers-Kronig in Pictures, colin_warwick
  33. » [SI-LIST] FYI: webpage updates, Istvan Novak
  34. » [SI-LIST] DDR3 equalization, Nick Langston
  35. » [SI-LIST] PDN related, Scooby Doo
  36. » [SI-LIST] Re: PDN related, Lee Ritchey
  37. » [SI-LIST] PSU ripple measurement, Lakshmi N. Sundararajan - PTU
  38. » [SI-LIST] Upcoming High Speed Design Class, Lee Ritchey
  39. » [SI-LIST] Different Simulation Results, Mohamad Haghtalab
  40. » [SI-LIST] PCIe Impedance, npatel
  41. » [SI-LIST] Broadcom looking for SI summer intern, Patrick Zilaro
  42. » [SI-LIST] engineering positions at Mayo Clinic, Zabinski, Patrick
  43. » [SI-LIST] Jitter Tolerance, ralf . inova
  44. » [SI-LIST] Hi... SI Master, $hiva
  45. » [SI-LIST] Re: Hi... SI Master, o. laney
  46. » [SI-LIST] Flooded Vias vs Thermal Relief, Jack Olson
  47. » [SI-LIST] Re: Flooded Vias vs Thermal Relief, Lee Ritchey
  48. » [SI-LIST] 90 OHM Differential Impedance, Saril
  49. » [SI-LIST] Re: 90 OHM Differential Impedance, o. laney
  50. » [SI-LIST] 重要ㄉ是 ……有件事非得告訴你不可, f83118
  51. » [SI-LIST] [inquiry] A question about the temperature keyword of ibis model, gezi
  52. » [SI-LIST] Pads Power PCB, Avtaar Singh
  53. » [SI-LIST] DDR3 VTT Accuracy Requirements, Hirshtal Itzhak
  54. » [SI-LIST] New College Grad Opening in SI team of LSI Corp, Praveen Soora
  55. » [SI-LIST] European IBIS Summit @ SPI 2010 - First Call for Papers/Participation, Ralf Brüning
  56. » [SI-LIST] Social Media, solves many problems of Real World, Amy Brown
  57. » [SI-LIST] PDN design, Jennifer Maharani
  58. » [SI-LIST] Sr. Signal Integrity Application Engineer for Molex Inc (China), satish pratapneni
  59. » [SI-LIST] Transient sim in specific time points, Ben
  60. » [SI-LIST] SSTL_18 Class I and SSTL_18 Class II, Sonu Kurian N.D
  61. » [SI-LIST] Package parasitics extraction, Alin Razafindraibe
  62. » [SI-LIST] Re: DDR3 Slew Rate derating, LIU Luping
  63. » [SI-LIST] decoupling capacitor placement/route, Gene Glick
  64. » [SI-LIST] Re: decoupling capacitor placement/route, Lee Ritchey
  65. » [SI-LIST] some help for the CX4 connector, Vincent Zeng
  66. » [SI-LIST] Relationship between loss tangent and dielectric constant's frequency dependence, Neo
  67. » [SI-LIST] the most desirable power plane design scheme, jemanakk
  68. » [SI-LIST] Re: the most desirable power plane design scheme, jemanakk
  69. » [SI-LIST] Simple Rational Model Estimation Method Given Transfer Function, eenville