[SI-LIST] Re: Flooded Vias vs Thermal Relief

 Jack,

We faced issue with through hole PTH pins when flooded :reason  it
results in colder solder joint in assembly
Vias- its  just a path to connect b/w layers; if you have BGA <=0.8mm
pitch the spokes creates a bad connectivity to planes ( many time we see
only one spoke having good contact to planes instead of four minimum-our
requirement) 
In these case we prefer to flood and have complete contact.

My 2 cents..


Nagaraj Shanmugam | Lead Designer - PCB Development




-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Jack Olson
Sent: Friday, March 19, 2010 8:25 PM
To: Shawn Arnold
Cc: SI-LIST
Subject: [SI-LIST] Re: Flooded Vias vs Thermal Relief

Thanks Shawn, that was an important point.
I didn't consider that before I wrote, but I've seen little pieces of
(almost) isolated planes hanging on by a single spoke or two. flooded
vias would join them up nicely!
Thanks everyone else, too!

stunned but enlighted,
Jack
.
On Fri, Mar 19, 2010 at 9:35 AM, Shawn Arnold <
shawn@xxxxxxxxxxxxxxxxxxxxxxxx> wrote:

> Hi Steve,
>
> The big deal with thermals is the lack of copper for return path on
higher
> density devices and via patterns, the ring and spokes eat away the Cu
that
> the traces run over. His question pertained only to vias not thru-hole
> devices. The impedance effect is minimal but the return path and Swiss
> cheesing of the planes is significant when with a single button click
he
> can
> turn on thermals for manual design review and direct connects for
Gerber
> generation.
>
> Shawn
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]
> On
> Behalf Of steve weir
> Sent: Friday, March 19, 2010 7:14 AM
> To: Jack Olson
> Cc: SI-LIST
> Subject: [SI-LIST] Re: Flooded Vias vs Thermal Relief
>
>  Jack, I would demand that anyone promoting such an idea back it up
with
> real numbers.  The back of my envelope shows that for reasonable
thermal
> ties the difference between solid and tied is about 24pH for a via
pair,
> or the equivalent of less than 2mils Z axis.
>
> Steve.
>
> Jack Olson wrote:
> > Greetings,
> > I am being instructed to flood all vias instead of using thermal
relief,
> to
> > get a "better" connection to planes. I've typically used thermal
reliefs
> > simply because they are easier to see in checking or design reviews
(but
> its
> > only one mouse click for me to change them so I'm not really
> complaining).
> >
> > but it got me thinking.....
> >
> > Have any test results ever showed that spokes have a significant
> impedance
> > or anything that can change circuit performance?
> > (and I'm referring to 12mil plated through-hole vias on boards
100MHz
> max)
> >
> > I don't remember anyone ever talking about that.
> >
> > surfin' the learnin' curve,
> > Jack
> >
> >
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>
> --
> Steve Weir
> IPBLOX, LLC
> 150 N. Center St. #211
> Reno, NV  89501
> www.ipblox.com
>
> (775) 299-4236 Business
> (866) 675-4630 Toll-free
> (707) 780-1951 Fax
>
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>
>
>


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