[SI-LIST] Re: PDN design
- From: Scott McMorrow <scott@xxxxxxxxxxxxx>
- To: Jennifer Maharani <jennifer.maharani@xxxxxxxxx>
- Date: Wed, 24 Mar 2010 09:40:46 -0400
Mr Fourier is your friend.
You might start with the book: "Power Distribution Network Design
Methodologies", Istvan Novak, Editor
Jennifer Maharani wrote:
> Hello all,
>
> In designing PDN (chip-pkg-board), many people do frequency domain
> analysis to determine the impedance of the PDN. What is it for? As far
> as power integrity is concerned, isn't it better and enough to run
> transient simulation to see the PWR/GND bounce seen from the chip e.g.
> I/O ?
>
> Many thanks,
> Jenni
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Scott McMorrow
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