[SI-LIST] Re: Flooded Vias vs Thermal Relief
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Michael Greim" <mgreim001@xxxxxxxxx>, wjcsongr@xxxxxxxxxxxxxxxxxxx
- Date: Fri, 19 Mar 2010 09:13:47 -0700
Well put!
> [Original Message]
> From: Michael Greim <mgreim001@xxxxxxxxx>
> To: <wjcsongr@xxxxxxxxxxxxxxxxxxx>
> Cc: Jack Olson <pcbjack@xxxxxxxxx>; SI-LIST <si-list@xxxxxxxxxxxxx>;
<si-list-bounce@xxxxxxxxxxxxx>
> Date: 3/19/2010 7:33:45 AM
> Subject: [SI-LIST] Re: Flooded Vias vs Thermal Relief
>
> Hmmmmm,
> How to address this one while being cordial. Ok, for
> starters, sarcasm cannon set on stun........
>
> OK, let's start with the low hanging fruit and move up.
> We certainly don't want things to be difficult for you while
> checking, so leave the thermals on for your check and then
> change them when you are done. The best of both worlds
> right? As you said, it's only a mouse click.
>
> I humbly suggest that you track down the origin of thermal
> attach vias and why they exist. I will give ya a hint. Through
> hole components. Hint two, a smt lead and fanout to via is
> also like a thermal attach.
>
> Have slicing and dicing simulation or tests been performed
> that show the impact of thermals on power distribution? Yes.
> If packed tightly and deeply enough you have a fraction of the conductor
> cross section that you thought you had. With high enough
> current, bad things can and will happen regarding conductor
> temp rise.
>
> Never back a methodology with the argument, "Well that's the
> way that I've always done it and its easier."
>
>
> Best Regards,
>
> Michael C. Greim
>
> And all this science they don't understand
> Is just my job six days a week.....
>
> We will either find a way or make one -Hannibal
>
> In the middle of every difficulty lies opportunity -Al Einstein
>
>
> Jack Olson <pcbjack@xxxxxxxxx>
> > Sent by: si-list-bounce@xxxxxxxxxxxxx
> > 03/19/2010 08:43 AM
> >
> > To
> > SI-LIST <si-list@xxxxxxxxxxxxx>
> > cc
> >
> > Subject
> > [SI-LIST] Flooded Vias vs Thermal Relief
> >
> >
> >
> >
> >
> >
> > Greetings,
> > I am being instructed to flood all vias instead of using thermal relief,
> > to
> > get a "better" connection to planes. I've typically used thermal reliefs
> > simply because they are easier to see in checking or design reviews (but
> > its
> > only one mouse click for me to change them so I'm not really
complaining).
> >
> > but it got me thinking.....
> >
> > Have any test results ever showed that spokes have a significant
impedance
> > or anything that can change circuit performance?
> > (and I'm referring to 12mil plated through-hole vias on boards 100MHz
max)
> >
> > I don't remember anyone ever talking about that.
> >
> > surfin' the learnin' curve,
> > Jack
> >
> >
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