Posts for si-list, 07-2013

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  1. » [SI-LIST] Re: A Question about Target Impedance Threshold computation, Smith, Larry
  2. » [SI-LIST] About agilent PLTS-AFR, ye tao
  3. » [SI-LIST] Re: About agilent PLTS-AFR, Hassan O . Ali
  4. » [SI-LIST] Modeling I/O buffer as an amplifier, Tom Comberiate
  5. » [SI-LIST] Ensure signal integrity... track at DesignCon2014, Yuriy Shlepnev
  6. » [SI-LIST] Negative Deterministic Jitter, vinod ah
  7. » [SI-LIST] Corrections of typing errors in my previous message., Joseph . Schachner
  8. » [SI-LIST] Why use phase matched cables for PCIe testing, confused
  9. » [SI-LIST] strobe based data bus, Balamanikandan K
  10. » [SI-LIST] [SI_LIST] Rj pattern Dependency, vinod ah
  11. » [SI-LIST] Employment Opportunity: SI Engineers in San Diego, Powers, Scott
  12. » [SI-LIST] Front Range Signal Integrity Seminar, Jim Rautio, July 11, 2013, Eric Bogatin
  13. » [SI-LIST] Microstrip or stripline for date rates 10Gbps, Tesla
  14. » [SI-LIST] plane cutouts under ac-coupling cap pads, Matthew Severini
  15. » [SI-LIST] Re: plane cutouts under ac-coupling cap pads, hassan
  16. » [SI-LIST] Effect of shielding on characteristic Impedance, Dhamija, Naresh
  17. » [SI-LIST] VRM Modeling of commercial DC-DC convetors, Jack Si
  18. » [SI-LIST] Is it because of convergence of the simulation tool ?, Balamanikandan K
  19. » [SI-LIST] 2013 EPEPS Conference - Deadline extended to July 20, 2013, EPEPS Admin
  20. » [SI-LIST] PWj in PCIe Base Spec, vinod ah
  21. » [SI-LIST] Materials for Architect of IC Packaging, Karthik P
  22. » [SI-LIST] PDN sim: why not IFFT ?, agathon
  23. » [SI-LIST] DDR2-Signal level-Clarification needed, Balamanikandan K
  24. » [SI-LIST] PDS sim: why not IFFT?, John Lipsius
  25. » [SI-LIST] Re: [SI_LIST] Rj pattern Dependency, Marty . Miller
  26. » [SI-LIST] Employment Opportunity at FCI for Signal Integrity Engineer (San Jose, CA), Andrew.Zambell
  27. » [SI-LIST] 2013 EPEPS Conference - Final Deadline extension, July 27, 2013, EPEPS Admin
  28. » [SI-LIST] Principal Engineer - Compilers, needed in Santa Clara, CA;, Mark Apton
  29. » [SI-LIST] Signal Integrity Technical Marketing Engineer - Job IRC97072, Romi Mayder
  30. » [SI-LIST] Differential pair PCB Xtalk, Balaji G
  31. » [SI-LIST] Further investigation about hand-metal ESD, Doug Smith
  32. » [SI-LIST] Smooth option in Hspice, bala
  33. » [SI-LIST] Global SI/EMC University at the IEEE EMC Conf in Denver Aug 6-8, 2013, Eric Bogatin
  34. » [SI-LIST] Regarding considering a transmission line as lumped or distributed, mallikarjun K
  35. » [SI-LIST] IBISCHK5 Parser Executables, Version 5.1.4, Now Available!, Mirmak, Michael
  36. » [SI-LIST] write time budget for DDR2, Balamanikandan K
  37. » [SI-LIST] Question about DJ, Sparsh Patwa
  38. » [SI-LIST] SET2DIL Matlab script, Rybak, Michelle
  39. » [SI-LIST] DDR2 spacing rule, bala
  40. » [SI-LIST] Transmit and receive in gigabit ethernet, Sabir
  41. » [SI-LIST] Power sum crosstalk calculation method--is there an error in OIF-CEI or 10GBase-KR?, Qin, Zhenshui (NSN - CN/Shanghai)
  42. » [SI-LIST] Power Plane impedance measurement on the PCB, Ravinder . Ajmani
  43. » [SI-LIST] HCSL Input Terminations, Dudi Tash
  44. » [SI-LIST] Recall: Power sum crosstalk calculation method--is there an error in OIF-CEI or 10GBase-KR?, Qin, Zhenshui (NSN - CN/Shanghai)
  45. » [SI-LIST] Spartan 6 IBIS model, Big Ben