[SI-LIST] Re: plane cutouts under ac-coupling cap pads

  • From: steve weir <weirsi@xxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Wed, 10 Jul 2013 17:39:04 -0700

Matthew, the first thing that comes to mind is masking by any number of 
other impairments.  A bit of a check-list:

1. How have you established your measurement reference?  Are you 
confident of your measurement deembedding?
2. How closely do the simulations match measurements?
3. Are there other discontinuities that you know about, or can perceive 
from measurements close to the DC blocking capacitors?

Physics always prevails.

Steve.
On 7/10/2013 4:10 PM, Matthew Severini wrote:
> Content-Type: text/plain; charset="us-ascii"
> Content-Transfer-Encoding: quoted-printable
> Hello experts,
>
> I have a problem that has me totally stumped, so I thought you may have som=
> e ideas. We have some signal lanes with dc-blocking caps, that run at about=
>   10ghz. I noticed that the planes had not been cutout underneath the pads o=
> f these caps, which has obvious issues. I simulated the cap structure in HF=
> SS to find an optimum cutout size, and rolled it into the next spin of the =
> board. All of my simulations claim that the new structure should have a hug=
> e positive influence on the si of these lanes. Unfortunately, when we measu=
> re the eye, it seems to be about the same, or ever so slightly worse! I did=
>   a tdr on the cards with and without the cutout, and the cutouts definitely=
>   seem to flatten the impedance curve along the trace. I haven't been able t=
> o do a vna measurement yet because I cannot access one side of the trace. I=
>   have ordered boards with only those caps on them so that I can make this m=
> easurement, but all the initial data seems to say that the transmission mea=
> surements will also be better with the cutouts. I was wondering if anyone h=
> ad some possible explanations as to why the eye would be a little worse, in=
>   almost every measurement (according to sig test), when the impedance is fl=
> atter.
>
> Thanks for your help,
>
> Matt Severini
>
> Signal Integrity Engineer
> mseverini@xxxxxxxxxxxx<mailto:mseverini@xxxxxxxxxxxx>
> (801) 987-7127
>
>
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