[SI-LIST] Signal Integrity Technical Marketing Engineer - Job IRC97072

From: Romi Mayder <romi.mayder@xxxxxxxxxx>
To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
Date: Fri, 19 Jul 2013 20:22:43 +0000
Job Title
[https://xapps9.xilinx.com/OA_HTML/cabo/images/swan/t.gif]

Signal Integrity Technical Marketing Engineer*


Location

[https://xapps9.xilinx.com/OA_HTML/cabo/images/swan/t.gif]

San Jose, CA, US


Organization Name

[https://xapps9.xilinx.com/OA_HTML/cabo/images/swan/t.gif]

Technical Marketing


Detailed Description

[https://xapps9.xilinx.com/OA_HTML/cabo/images/swan/t.gif]




Applicant will develop marketing requirements which address system performance 
in focused functional areas such as (1) advanced package design including 
stacked silicon interconnect, (2) highly programmable parallel IO electrical 
specifications, and (3) signal integrity and power integrity specifications of 
Xilinx's leading edge next generation productions. Applicant will validate 
signal integrity and power integrity solutions covering critical elements in 
advanced FPGA systems, including IC/TSV device, package, and system level 
printed circuit board interface. Applicant will utilize techniques in EM 
(Electro-Magnetics), circuit model generation, simulation, and validation for 
correlating hardware measurements versus pre/post-layout simulation.

Create Application notes/White Papers that demonstrate Xilinx's solutions in 
the area of packaging, IO electrical, and SI/PI. Educate and train Field 
Applications Engineers on the use and unique benefits of these solutions. 
Applicant should work closely with the field to analyze and solve customer 
problems. Preparation of customer ready presentations and other marketing 
collateral to explain technical details of these solutions and competitive 
analysis of other vendors' products. Applicant will support critical sales 
opportunities as a pre-sales applications engineer.


*       8+years of relevant professional experience/education in high speed 
digital designs, modeling and hardware characterization


*       BS/EECS required;


*       Familiarity with (1) power aware IBISv5.1 behavioral IO models, (2) EM 
extraction tools/platforms such as Ansys HFSS, Cadence 
PowerSI/Speed2000/XcitePI, (3) transient-convolution simulations using Synopsys 
Hspice and Agilent ADS, (4) S-parameter based simulations using Agilent ADS, 
and (5) writing scripts using Matlab/Python.



*       Thorough understanding of S-parameter modeling methodology, power 
Integrity principles, good simulation/debugging insights, physical 
scaling/dimension implications to EM behavior of silicon circuits, transmission 
paths/media, discrete/passive components, and integration of 
silicon/package/board structures.



*       Clear understanding of frequency domain versus time domain interactions 
and passivity, causality, and reciprocity. Further emphasis on large-dimension 
feedback mechanisms among circuit components such as driver and decoupling 
strategy on silicon, package, and board. Clear understanding of power 
distribution network design and optimization techniques. Cost conscious design 
principle and experience.



*       Requires excellent written and verbal communications skills.


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[SI-LIST] Signal Integrity Technical Marketing Engineer - Job IRC97072

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