Hi All, For a new design, I'm using a Clock Buffer for the PCIe REFCLK. The interface is called HCSL, but I'm trying to figure out which terminations should be added externally to the receiver (INPUT) of the clock buffer. I'm using the IDT 9DBV0841 as the clock buffer and I'm familiar with the required output termination, (33Ohm in series and 50 Ohm to GND), but I couldn't find anything for the input terminations. Please advise. Thanks Best Regards, Dgtronix Ltd. I Founder & CEO I Dudi Tash eFax: +972-3-7256490 I Mobile: +972-54-6345629 I Office: +972-9-9660967 www.dgtronix-tech.com<http://www.dgtronix-tech.com/> [Description: Description: dgtronix3]<http://www.dgtronix-tech.com/>[Description: dgtrips]<http://www.dgtronix-tech.com/newsletter> [Description: onix]<http://www.dgtronix-tech.com/products> [Description: 1]<http://www.facebook.com/pages/Dgtronix/145261332289266> [Description: 2] <http://www.linkedin.com/company/2831206?trk=tyah> [Description: eng-iso 9001-2008] *This email contains confidential and proprietary information of Dgtronix Ltd.* ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List forum is accessible at: http://tech.groups.yahoo.com/group/si-list List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu
