Posts for si-list, 09-2008

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  1. » [SI-LIST] Will a DPAK (TO263) hang on?, Dimiter Popoff
  2. » [SI-LIST] SPICE model extensions, Mohamad Haghtalab
  3. » [SI-LIST] Advanced notice: The IEEE EMC Society is interested in practical design!, Roy Leventhal
  4. » [SI-LIST] Unshielded loops as useful as shielded ones for many uses in SI and EMC, Doug Smith
  5. » [SI-LIST] Lee Ritchey 3 day SI training in Copenhagen, Denmark, Oct 7-9, Axcon/Rolf V. Ostergaard
  6. » [SI-LIST] SI pop quiz now ready to try, Eric Bogatin
  7. » [SI-LIST] SERDES backplane ATCA PICMG 3.0, shivanand b
  8. » [SI-LIST] low loss pcb material, Joel Brown
  9. » [SI-LIST] NELCO N-13ep HiTg > 170C, costel
  10. » [SI-LIST] About Power Management IC which can sink current, Han Li
  11. » [SI-LIST] simulation in Nexxim, Mohamad Haghtalab
  12. » [SI-LIST] HSPICE Technial Seminar for SI Engineers, Timothy Coyle
  13. » [SI-LIST] Asian IBIS Summit (China) - Third Announcement, Bob Ross
  14. » [SI-LIST] Free Agilent event "High-Speed Digital Seminar - Tackling High-Speed Serial Designs" in six North American cities, colin_warwick
  15. » [SI-LIST] Calibration using VNA, padma gundala
  16. » [SI-LIST] Bogatin Enterprises SI classes in San Jose Sept 27- Oct 2, Eric Bogatin
  17. » [SI-LIST] Key factor in SI measurement, Zhangkun
  18. » [SI-LIST] Fw: PCI IO buffer problem?, yinhongcheng
  19. » [SI-LIST] question about SFF8431, yan chunbao
  20. » [SI-LIST] Controlling Plane-cap Anti-resonance, Bradley Henson
  21. » [SI-LIST] ADS SI training classes Santa Clara CA October 21-24, colin_warwick
  22. » [SI-LIST] Free Agilent Events: "Interconnect Analysis & Modeling Workshop" Santa Clara CA, September 22, colin_warwick
  23. » [SI-LIST] Re: simulation in Nexxim, wfting
  24. » [SI-LIST] test message, Private Public
  25. » [SI-LIST] Re: Calibration using VNA, padma gundala
  26. » [SI-LIST] FW: Calibration using VNA, Richard Jungert
  27. » [SI-LIST] Free CDROMs with Agilent Signal Integrity Webcasts, colin_warwick
  28. » [SI-LIST] USB cap placement, Ravindra Johari
  29. » [SI-LIST] (JOB) Senior Applications Engineer (Sunnyvale, CA or Westlake Village, CA), Ho, Francis
  30. » [SI-LIST] Majic Fbaud/1667 for CDR bandwidth, Steve Waldstein
  31. » [SI-LIST] Question on PDN simulation with Linear Technology spice, Moreira, Jose
  32. » [SI-LIST] What are your favorite signal integrity sources?, colin_warwick
  33. » [SI-LIST] Asian IBIS Summit (Japan) Third Announcement, Mirmak, Michael
  34. » [SI-LIST] (JOB) SI Applications Manager (Santa Clara, CA), Chee Hoe Chu
  35. » [SI-LIST] Re: plane-to-plane decoupling, Lee Ritchey
  36. » [SI-LIST] New Public High Speed Design Classes, Lee Ritchey
  37. » [SI-LIST] pop quiz results and free onLine lecture now posted, Eric Bogatin
  38. » [SI-LIST] Ansoft Techincal Workshop - Inspiring Engineering, Chris Herrick
  39. » [SI-LIST] Workshop on IC Failure Analysis / FIB, Mohan TN \(Tessolve\)
  40. » [SI-LIST] AD8334 LNA SPICE Macro-model, Mohamad Haghtalab
  41. » [SI-LIST] AD8334 LNA SPICE Macro-model(attached!), Mohamad Haghtalab
  42. » [SI-LIST] S-parameter for serial channel, Angela Clark
  43. » [SI-LIST] FW: Workshop on VLSI Circuit Edit / Failure Analysis / FIB, Mohan TN \(Tessolve\)
  44. » [SI-LIST] doubt in lossless transmission line funda, Canes Venatici
  45. » [SI-LIST] Measured waveform is not stable, priya R
  46. » [SI-LIST] Decaps used in CMOS-45nm tehcnology????, prem kumar
  47. » [SI-LIST] Re: Measured waveform is not stable, Chris Chalmers
  48. » [SI-LIST] Spectrum of a square wave with rise time, Isaac Waldron
  49. » [SI-LIST] Customizing ADS Components - Ideal Delay Line, colin_warwick
  50. » [SI-LIST] FW: Re: Majic Fbaud/1667 for CDR bandwidth, Richard Jungert
  51. » [SI-LIST] Help me get more Web 2.0 visibility?, colin_warwick
  52. » [SI-LIST] 8 layer stackup recommandation, Mustafa Özgür TUTUM
  53. » [SI-LIST] Webcast from the IEEE EMC Symposium in Detroit, Doug Smith
  54. » [SI-LIST] Li cell impedance characteristics, Barry Rowland
  55. » [SI-LIST] Multiple power planes coupling to ground, Joseph Pankow
  56. » [SI-LIST] Re: My new SI blog, V S
  57. » [SI-LIST] Sr. Signal Integrity Engineer Position Available @ Sun Microsystems, Inc., Derek Tsai
  58. » [SI-LIST] Asian IBIS Summit (China) - Fourth Announcement, Bob Ross
  59. » [SI-LIST] Re: FW: Multiple power planes coupling to ground, Joseph Pankow
  60. » [SI-LIST] bypass caps on unused pcb area, Joel Brown
  61. » [SI-LIST] EBD_Model., Karthikeyan D
  62. » [SI-LIST] Data Acquisition through Oscilloscope., Nirmale G
  63. » [SI-LIST] Ethernet - distance between PHY and magnetics - any limits, dotter
  64. » [SI-LIST] Re: Ethernet - distance between PHY and magnetics - any limits, olaney
  65. » [SI-LIST] Do you know anyone that is equally qualified on signal integrity/sales?, Jennifer Loesch
  66. » [SI-LIST] Re: si-list Digest V8 #298, Tom Zych
  67. » [SI-LIST] Signal Integrity Jobs at Cisco, Amit Agrawal (amiagra2)
  68. » [SI-LIST] AD8334(no PSPICE !) SPICE model, Mohamad Haghtalab