Posts for si-list, 11-2001
Browse: Last Month: 10-2001 Main Archive Page Next Month: 12-2001
- » [SI-LIST] Trace spacing between 200 MHz signals -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] multi-band devices -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Update on information requested on Buried Capacitance etc.. -
- » [SI-LIST] Re: lumped model vs distributed model -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing ) -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Re: public domain 2D RLGC solver -
- » [SI-LIST] public domain 2D RLGC solver -
- » [SI-LIST] Re: Swing control for Gigabit chips -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] PCD Mag article on PDS design -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing ) -
- » [SI-LIST] Re: Swing control for Gigabit chips -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Swing control for Gigabit chips -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Re: Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Buried Capacitance thread comments (The whole thing) -
- » [SI-LIST] Buried Capacitance thread comments -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn and contribute to Signal Integrity -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn andcontribute to Signal Integrity -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn and cont ribute to Signal Integrity -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn and contribute to Signal Integrity -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn and contribute to Signal Integrity -
- » [SI-LIST] Re: Si-list is one awesome avenue to learn and contribute to Signal Integrity -
- » [SI-LIST] Si-list is one awesome avenue to learn and contribute to Signal Integrity -
- » [SI-LIST] Re: FW: Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: FW: Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] FW: Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Using XFX Field Solver -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mi ls -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Power handling -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Sanmina patent on dielectric thicknesses under 4 mils -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: physics behind EMI powerline filters -
- » [SI-LIST] physics behind EMI powerline filters -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Power handling -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Yeee-Ha! -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Power handling -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Square wave harmonics -
- » [SI-LIST] Re: Power handling -
- » [SI-LIST] Power handling -
- » [SI-LIST] Re: replacing ECL ?? -
- » [SI-LIST] Re: replacing ECL ?? -
- » [SI-LIST] offset -
- » [SI-LIST] replacing ECL ?? -
- » [SI-LIST] Re: Inductance of Spiral Inductors - why not to us a network analyser for Q measurement -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Differential Impedance -
- » [SI-LIST] Re: Signal integrity analysis checklist -
- » [SI-LIST] Re: Stackup layer change - effect on partial self inductance of the p lane -
- » [SI-LIST] Re: Stackup layer change - effect on partial self inductance of the plane -
- » [SI-LIST] Re: Stackup layer change - effect on partial self inductance of the plane -
- » [SI-LIST] Stackup layer change - effect on partial self inductance of the plane -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: Inductance of Spiral Inductors - why not to use a network analyser for Q measurement -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: Bit Error Caused by NOISE -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Bit Error Caused by NOISE -
- » [SI-LIST] Re: Inductance of Spiral Inductors -
- » [SI-LIST] test *eom* -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: Fw: Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: Inductance of Spiral Inductors -
- » [SI-LIST] Re: Inductance of Spiral Inductors -
- » [SI-LIST] Inductance of Spiral Inductors -
- » [SI-LIST] Position wanted in Italy -
- » [SI-LIST] Re: Help in interpreting this hspice command -
- » [SI-LIST] Help in interpreting this hspice command -
- » [SI-LIST] Re: Fw: Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: Recent VIrus 'postings' -
- » [SI-LIST] Re: trellis coding -
- » [SI-LIST] trellis coding -
- » [SI-LIST] Recent VIrus 'postings' -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] Re: Common Mode choke coil -Spice Model -
- » [SI-LIST] Re: S-parameter simulation in Time Domain -
- » [SI-LIST] S-parameter simulation in Time Domain -
- » [SI-LIST] AW: Common Mode choke coil -Spice Model -
- » [SI-LIST] Re: LVPECL DC bias -
- » [SI-LIST] Common Mode choke coil -Spice Model -
- » [SI-LIST] Test point program. -
- » [SI-LIST] LVPECL DC bias -
- » [SI-LIST] Er Variation -
- » [SI-LIST] Material Properies @ High Frequency -
- » [SI-LIST] Paksi-E in BGA Substrate Design? -
- » [SI-LIST] Re: RF layout guidelines -
- » [SI-LIST] Interconnect Synthesis -
- » [SI-LIST] Re: PCB design and manufacturing magazines -
- » [SI-LIST] PCB design and manufacturing magazines -
- » [SI-LIST] Re: Quarter wavelength transmission lines -
- » [SI-LIST] Re: Quarter wavelength transmission lines -
- » [SI-LIST] Quarter wavelength transmission lines -
- » [SI-LIST] Re: PCI-66 design rules -
- » [SI-LIST] PCI-66 design rules -
- » [SI-LIST] Re: Impedance measurement using TDR -
- » [SI-LIST] Re: [Question]Mixed Singal PCB ground strategy -
- » [SI-LIST] Re: PCI-X package info. -
- » [SI-LIST] [Question]Mixed Singal PCB ground strategy -
- » [SI-LIST] [Question]Mixed Signal PCB -
- » [SI-LIST] Question about Mixed Signal On PCB -
- » [SI-LIST] Re: Impedance measurement using TDR -
- » [SI-LIST] Re: Are there any ways to use DSO type scopes for eye p attern measure ment? -
- » [SI-LIST] PCI-X package info. -
- » [SI-LIST] Re: Are there any ways to use DSO type scopes for eye p attern measure ment? -
- » [SI-LIST] Re: Are there any ways to use DSO type scopes for eye pattern measurement? -
- » [SI-LIST] Are there any ways to use DSO type scopes for eye pattern measurement? -
- » [SI-LIST] Re: Impedance measurement using TDR -
- » [SI-LIST] Re: Spice to Ibis conversion -
- » [SI-LIST] impedance calculation -
- » [SI-LIST] Re: Impedance measurement using TDR -
- » [SI-LIST] Spice to Ibis conversion -
- » [SI-LIST] Re: Signal integrity analysis checklist -
- » [SI-LIST] Re: Impedance mismatch due to Cu pours -
- » [SI-LIST] Re: Impedance mismatch due to Cu pours -
- » [SI-LIST] Re: Impedance measurement using TDR -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: emi shielding -
- » [SI-LIST] Re: emi shielding -
- » [SI-LIST] emi shielding -
- » [SI-LIST] Re: Impedance mismatch due to Cu pours -
- » [SI-LIST] Re: Impedance mismatch due to Cu pours -
- » [SI-LIST] Re: Impedance mismatch due to Cu pours -
- » [SI-LIST] Impedance mismatch due to Cu pours -
- » [SI-LIST] Re: Resistivity of Bras -
- » [SI-LIST] Looking for replacement tips for a Tektronix P7330 diff probe...... -
- » [SI-LIST] Re: distributed packaging model -
- » [SI-LIST] Re: Resistivity of Bras -
- » [SI-LIST] Re: Resistivity of Bras -
- » [SI-LIST] Re: distributed packaging model -
- » [SI-LIST] distributed packaging model -
- » [SI-LIST] Re: Resistivity of Bras -
- » [SI-LIST] Resistivity of Bras -
- » [SI-LIST] High RF impedance surfaces -
- » [SI-LIST] Re: Trace Inductance -
- » [SI-LIST] Re: Conductivity for FR4 -
- » [SI-LIST] Re: Trace Inductance -
- » [SI-LIST] Re: Trace Inductance -
- » [SI-LIST] Impedance measurement using TDR -
- » [SI-LIST] New App Notes: Switching Noise, HDI, Inductance... -
- » [SI-LIST] Conductivity for FR4 -
- » [SI-LIST] Re: Ansoft Turbo Package Analyzer -
- » [SI-LIST] Re: Ansoft Turbo Package Analyzer -
- » [SI-LIST] Re: Ansoft Turbo Package Analyzer -
- » [SI-LIST] Signal integrity analysis checklist -
- » [SI-LIST] Request for 555 timer IBIS model -
- » [SI-LIST] Intusoft ICAP4/IsSpice vs. Cadence Capture/PSpice -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] more on glitches caught on a scope -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: shielding effectiveness -
- » [SI-LIST] shielding effectiveness -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Differences between HSPICE Field Solver and XTK Field Solver -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -
- » [SI-LIST] Loss tangent and Dielectric conductance -
- » [SI-LIST] Re: Differences between HSPICE Field Solver and XTK Field Solver -
- » [SI-LIST] Re: Historical question: IBIS & Quad TLC? -