[SI-LIST] Re: Sanmina patent on dielectric thicknesses under 4 mils
- From: "Zabinski, Patrick J." <zabinski.patrick@xxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Tue, 27 Nov 2001 13:17:01 -0600
Ron,
This topic has come up on the SI-List before (three or four times
since I joined), and the end result is usually the same:
there's no work-around.
If I recall correctly, anyone using plane-to-plane spacing
less than 4 mils run up against the patent, and they
must obtain permission to do so.
The point I'm not certain on is who is responsible for
obtaining the permission. I believe the board manufacturers
are the ones that usually assume the responsibility
for this, but I'm not certain of it.
Pat
>
> Hi Guys
>
> I am up against the problem of using thinner dielectric in
> order to eliminate the need for sub-1000 pf bypass capacitors.
>
> While this technique was used for many years some idiot at
> the patent office actually gave them a patent for it. No
> novelty at all but standard practice.
>
> Is anyone else having trouble with this?
>
> Does anyone have published articles or books that document
> this use prior to 1989?
>
> If so, please let me know. Perhaps a consortium of industry
> professionals can help to remove this travesty of the patent system.
>
> Ron Miller
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
