[SI-LIST] Re: Buried Capacitance thread comments (The whole thing)
- From: Chris Cheng <chris.cheng@xxxxxxxxxxxx>
- To: "'MikonCons@xxxxxxx'" <MikonCons@xxxxxxx>, si-list@xxxxxxxxxxxxx
- Date: Wed, 28 Nov 2001 20:42:51 -0800
There are those who use scare tactics to justify their consulting
jobs and academic life and there are those who have to do real
designs and ship products.
Sure, you can write a paper by doing the following experiment :
Put some switching push pull drivers as microstrip and toggle
them at fast edge rate. The fact that its microstrip denies
one of the switch edge (most likely the low to high transition)
image current to return on the reference plane. In order to
provide a low impedance path for the return current, you either
have to provide 100's of decoupling caps (just to have low
enough ESL) for the return current or you use Zycon planes to
provide the low impedance capacitor path.
What the paper didn't say is if you bury the signal trace with
the proper reference planes and there by providing the lowest
and tightest coupling return path, the EMI and noise will drop
to beyond any 100's of caps or Zycon plane can provide you.
Congratulations on discovering plane resonance. Now try this
real world experiment. Sprinkle in hundreds of decoupling
capacitors with different values and in different location.
Then put in thousands of power and ground vias mimicking
real life package power and ground pins. Stitch ground
vias around the edge of the board like what real world
design. Lets see if you still have your resonance.
-----Original Message-----
From: MikonCons@xxxxxxx [mailto:MikonCons@xxxxxxx]
Sent: Wednesday, November 28, 2001 6:38 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Buried Capacitance thread comments (The whole thing)
[MLC] Sorry, Chris, but you are WAY off on this one. Check out the
literature
from 1989-1991 and the electronic "Product of the Year" award given to Zycon
for the ZBC 2000 product (the original name) for EMI reduction. I know you
are practicing some good design to achieve Class B certification, but good
power/ground plane decoupling plays a major part in that success. Many
papers
demonstrated attenuatin of 20-30 dB over all frequencies above 40 MHz when
using BC and DELETING over 100 0.1 Uf decoupling capacitors. (Check with Dr.
Jim Howard at Sanmina, Santa Clara, CA if you doubt this.) Lee Ritchey
commented correctly on the contribution of the planar decoupling.
*********
[MLC] Chris makes a key point in identifying the return path for any
high-speed currents. However, the reference to the Zycon planes seems to be
a
slam at the benefits of that technology. If one studies RF techniques in
depth, then the fact that for a given resonance frequency the Q of that
resonance
is decreased with increased capacitance. This is the unheralded forte of the
buried capacitance concept. I have performed spectrum analyzer tests (with a
tracking generator) on circular and square PCBs (11" diameter/side)
employing
BC that clearly demonstrated (relative to identical PCBs without BC) NO
RESONANCE effects at high frequencies (>40 MHz). The effect of this
characteristic is LOWER EMI that is (many times) caused by PCB dimensional
resonances. This benefit is particularly useful for High-Tg FR-4 boards and
higher frequency designs (>500 MHz) as the FR-4 losses play a significant
role at the higher harmonics.
*********
From the above comnments, I wish only to convey that we are all still
learning, and an open mind is critical to solving the design challenges of
the future.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
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