[SI-LIST] Re: anti-resonance point when use Embedded Capacitance Material
- From: Istvan Novak <istvan.novak@xxxxxxxxxxx>
- To: bruce@xxxxxxxxxx
- Date: Thu, 09 May 2013 08:16:56 -0400
Hi Bruce,
The anti-resonance between the static capacitance of planes and
inductance of bypass capacitors will always be present unless you either
match the plane impedance with the ESRs of capacitors or overwhelm the
antiresonance with MANY low-inductance bypass capacitors. The
antiresonance is present with any laminate material, thin or thick.
When you use thin laminates (Embedded Capacitance Material), the
resonance magnitude and frequency both get lower with respect to a
thicker laminate. First you have to determine whether the resonance
causes a problem for power, signal integrity and EMI. If you dont
excite the resonance, you dont need to care.
Regards,
Istvan Novak
Oracle
On 5/9/2013 2:26 AM, Bruce wrote:
> Hi Expert
>
>
> We use Embedded Capacitance Material for better PDN and less capacitor
> component. According to PDN Simulation. We notice that is an anti-resonance
> point between capacitor and Plane.
>
>
>
> We can find that when use Embedded Capacitance Material. There are much
> better in most frequency but near anti-resonance point.
>
>
>
> In this case. We have to solution.
>
> 1. Try to reduce the anti-resonance point. We need many high frequency
> capacitor component. That is not good because we want to reduce the number
> of capacitor component. Our purpose is reduce 70% number of capacitor
> component.
>
> 2. Keep this anti-resonance point. That maybe have a risk if there is
> some noise by chance in this frequency
>
>
>
> How about your suggestion? Please let me know if my question is not clear
> enough.
>
> Thanks
>
>
>
> Best Regards,
>
> Bruce Wu
>
>
>
>
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