[SI-LIST] Re: anti-resonance point when use Embedded Capacitance Material

  • From: Bradley Brim <bradb@xxxxxxxxxxx>
  • To: Scott McMorrow <scott@xxxxxxxxxxxxx>
  • Date: Fri, 10 May 2013 12:27:41 -0700

Hi Scott,
Excellent point!
Stitching  the perimeter of a design does not eliminate PDN resonances. It 
changes them by changing a near-open edge boundary to a near-short. This 
reduces emissions from the stitched perimeter. Problem is there are typically 
many other edges in the design from which radiation will occur. Conceptually, 
if you've contained the energy that would have leaked out the edge, then you 
increase the Q (stored energy/dissipated energy) and this will enhance the 
radiation from other parts of the design.

Alternately, from the viewpoint of the currents/charges being the source of 
emissions ... even after perimeter stitching there are still many sources of 
emissions and the cavity resonances to potentially source such.

Cheers,
-Brad

From: Scott McMorrow [mailto:scott@xxxxxxxxxxxxx]
Sent: Friday, May 10, 2013 12:17 PM
To: Bradley Brim
Cc: Antonis Orphanou; leeritchey@xxxxxxxxxxxxx; dennis.han@xxxxxxxxx; 
si-list@xxxxxxxxxxxxx
Subject: Re: [SI-LIST] Re: anti-resonance point when use Embedded Capacitance 
Material

This is why it is important to utilize ground stitching on boards.  Many 
engineers will use a Faraday shield of stitching vias around the edge of the 
board.  However, it is also important to ground stitch the remainder of the 
board surface area.  Often this is done by default, due to the density of 
components on the board.But, there are many cases where boards are designed 
without ground stitching in areas without components.  By performing general 
ground stitch across the board, you help to break up the power ground cavities, 
and keep them from coupling (radiating) into the ground system.

On Fri, May 10, 2013 at 3:06 PM, Bradley Brim 
<bradb@xxxxxxxxxxx<mailto:bradb@xxxxxxxxxxx>> wrote:
Hello Antonis,
For a patch antenna a classical RF/microwave question is, what radiates? Is it 
the current/charge on the metal shape or the edge fields (equivalent magnetic 
current if you wish)?  You can view it either way but not both. Similarly and 
arguably even more so for a plane cavity of a pcb; is it the edge fields that 
radiate or the current/charge on the plane shape? Again, it is either (but not 
both). My previous comments were from the viewpoint that plane pair cavities 
radiate from their edges.

When one adds emicaps, just as when one adds decaps, the mounting inductance 
and ESL are important considerations. As you hint, well above single digit GHz 
frequencies the impedance of mounted "realistic" caps will limit their 
effectiveness at eliminating resonances. Thinner layers of so-called embedded 
capacitance materials significantly reduces the mounting inductance. In 
combination with small, low ESL caps can yield higher frequencies for resonance 
damping than many may expect.

Best regards,
 -Brad

-----Original Message-----
From: Antonis Orphanou 
[mailto:orphanou@xxxxxxxxxxxx<mailto:orphanou@xxxxxxxxxxxx>]
Sent: Friday, May 10, 2013 11:39 AM
To: Bradley Brim; leeritchey@xxxxxxxxxxxxx<mailto:leeritchey@xxxxxxxxxxxxx>; 
dennis.han@xxxxxxxxx<mailto:dennis.han@xxxxxxxxx>; 
si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: RE: [SI-LIST] Re: anti-resonance point when use Embedded Capacitance 
Material

Is edge fringing a real concern here? The dielectric to air interface is highly 
reflective after all  .....
The first order radiation mechanism is image currents from resonating planes 
(and patch antenna concepts as earlier mentioned).

An ideal capacitor array is like an EM wall that splits the power plane into 
smaller sections hence shifting the radiated spectrum and resonance frequencies 
higher up in spectrum.  Can a realistic capacitor and its inductance achieve 
that task? Judging from earlier responses that sounds impossible....



-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx> 
[mailto:si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>] On 
Behalf Of Bradley Brim
Sent: Friday, May 10, 2013 11:16 AM
To: leeritchey@xxxxxxxxxxxxx<mailto:leeritchey@xxxxxxxxxxxxx>; 
dennis.han@xxxxxxxxx<mailto:dennis.han@xxxxxxxxx>; 
si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: anti-resonance point when use Embedded Capacitance 
Material

Hi Lee,
Plane pair cavity resonances contribute to emissions. The earliest power 
integrity experts seem to have been EMC engineers concerned less with PDN noise 
at devices and more concerned with reducing emissions from the PDN. One can 
even view the operation of a microstrip patch antenna as a form of plane pair 
resonance and its sole purpose is to send/receive radiated emissions.

To address a topic of the original inquiry ...
Smaller plane separation implies less area of equivalent magnetic current at 
the plane pair edge, or equivalently less local fringing field volume, and 
therefore lower emissions for a given field strength. However, the smaller the 
plane separation the higher the Q of the cavity can be, implying a higher field 
strength at the plane pair edges.

At frequencies where the sum of mounting inductance and ESL for the cap do not 
combine to make them exceedingly high impedance they will certainly affect 
plane resonances, whether or not placed in a uniform or grid pattern. EMC 
engineers typically guide for a uniform/grid placement with spacing based on a 
fraction of the wavelength in the cavity material at the highest frequency of 
concern. I observe PI experts with access to simulation tools approach the 
issue by visualizing PDN cavity resonances and placing caps near 
voltage/impedance maxima. This may not eliminate all resonances and can serve 
to shift the resonances to other frequencies. An iterative process of analyzing 
and cap placement is pursued. I've seen cases where this can yield as many or 
more caps than a uniform/grid placement. A procedure to consider simultaneous 
placement of all required "emicaps" (rather than the iterative process that 
does not reexamine selection/placement from previous iterations) can yield
 significantly fewer caps for the same level of emissions.

Best regards,
 -Brad

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx> 
[mailto:si-list-bounce@xxxxxxxxxxxxx<mailto:si-list-bounce@xxxxxxxxxxxxx>] On 
Behalf Of Lee
Sent: Friday, May 10, 2013 9:16 AM
To: dennis.han@xxxxxxxxx<mailto:dennis.han@xxxxxxxxx>; 
si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: anti-resonance point when use Embedded Capacitance 
Material

I have seen no evidence that plane resonances contribute to EMI or that
distributing capacitors evenly over a plane has much effect on resonances.
I do this so that there is an even distribution of "ground" vias across the
planes as has been recommended by Istvan.

-----Original Message-----
From: Dennis
Sent: Friday, May 10, 2013 7:09 AM
To: si-list@xxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxx>
Subject: [SI-LIST] Re: anti-resonance point when use Embedded Capacitance
Material

There are also free spreadsheet calculators from Altera, Xilinx, and Terry
Fox & Associates.  KEMET Spice can be used for that purpose to some extent.

Dennis

--- In si-list@xxxxxxxxxxxxxxx<mailto:si-list@xxxxxxxxxxxxxxx>, Ken Wyatt 
<ken@...> wrote:
>
> Thanks Chas,
> I remember those days...things have progressed greatly.
>
> Do you, or the group, know of affordable simulation S/W (Ansoft, maybe?)
> that would simulate plane resonances? My limited budget won't support
> multi-G$ S/W, unfortunately. That would be pretty cool to be able to
> simulate that. I saw a recent  demo of HyperLynx that was impressive.
>
> I know Istvan has several Excel calculators that will model PDN
> impedances.
>
> You coming to the Denver symposium this year?
>
> Cheers, Ken
> ___________________
> Kenneth Wyatt
> Wyatt Technical Services LLC
> Woodland Park, CO
> ken@...
> Web  Newsletter
> Connect with me on LinkedIn!
>
> On May 9, 2013, at 2:22 PM, Grasso, Charles wrote:
>
> > Hello Ken,
> >
> > When faced with large areas of pwb that have little or no components, it
> > used  common practice for EMI guys to add lossy caps (the lossier the
> > better)
> > to the planes in a regular pattern to minimize the effects of plane
> > resonance. With modern simulation tools, the  resonant modes of the
> > planes
> > can be simulated and caps added (in just the right spot!) to reduce the
> > effect.
> >
> > Chas
> >
> > -----Original Message-----
> > From: si-list-bounce@... 
> > [mailto:si-list-bounce@<mailto:si-list-bounce@>...] On Behalf Of Istvan
> > Novak
> > Sent: Thursday, May 09, 2013 7:23 AM
> > To: Ken Wyatt
> > Cc: bruce@...; si-list@...
> > Subject: [SI-LIST] Re: anti-resonance point when use Embedded
> > Capacitance Material
> >
> > Ken,
> > Bypass capacitors with more lossy dielectrics do help somewhat, but the
> > dielectric loss shows up strongly in the ESR only at frequencies much
> > lower than the series resonance frequency, where we usually dont need
> > the higher ESR.  Very lossy (and sloppy) dielectrics, such as Z5U and
> > Y5V are good for cheap consumer electronics, but for professional
> > circuits there are many drawbacks and it is not the best thing to use
> > them.  Ceramic capacitors with user-defined ESR are available from two
> > of the major capacitor vendors, so they can be used when we need the
> > highest performance and can afford the higher cost for these parts.
> >
> > Regards,
> >
> > Istvan Novak
> > Oracle
> >
> >
> >
> >
> > On 5/9/2013 9:00 AM, Ken Wyatt wrote:
> >> Hi Group & Bruce,
> >>
> >> I'm kind of a "newby" when it comes to SI, but am reading Lee Richey's
> >> books on the subject.
> >>
> >> One thing he recommends for PDN designs is the use of bypass
> >> capacitors with a more lossy dielectric (higher ESR), such as X5R, Z5U
> >> or Y5V, to dampen the anti-resonance. Would this be a reasonable thing
> >> to try?
> >>
> >> Ken
> >> ___________________
> >> Kenneth Wyatt
> >> Wyatt Technical Services LLC
> >> Woodland Park, CO
> >> ken@... <mailto:ken@<mailto:ken@>...> Web
> >> <http://www.emc-seminars.com> Newsletter
> >> <http://emc-seminars.us1.list-manage.com/subscribe?u?7f203d1f64dd89f
> >> 06b0c3f5&id 0f29a904> Connect with me on LinkedIn
> >> <http://www.linkedin.com/in/kennethwyatt>!
> >>
> >> On May 9, 2013, at 5:16 AM, Istvan Novak wrote:
> >>
> >>> Hi Bruce,
> >>>
> >>> The anti-resonance between the static capacitance of planes and
> >>> inductance of bypass capacitors will always be present unless you
> >>> either match the plane impedance with the ESRs of capacitors or
> >>> overwhelm the antiresonance with MANY low-inductance bypass
> >>> capacitors.  The antiresonance is present with any laminate material,
> >>> thin or thick.
> >>> When you use thin laminates (Embedded Capacitance Material), the
> >>> resonance magnitude and frequency both get lower with respect to a
> >>> thicker laminate.  First you have to determine whether the resonance
> >>> causes a problem for power, signal integrity and EMI.  If you dont
> >>> excite the resonance, you dont need to care.
> >>>
> >>> Regards,
> >>>
> >>> Istvan Novak
> >>> Oracle
> >>>
> >>>
> >>>
> >>>
> >>> On 5/9/2013 2:26 AM, Bruce wrote:
> >>>> Hi Expert
> >>>>
> >>>>
> >>>> We use Embedded Capacitance Material for better PDN and less
> >>>> capacitor component. According to PDN Simulation. We notice that is
> >>>> an anti-resonance point between capacitor and Plane.
> >>>>
> >>>>
> >>>>
> >>>> We can find that when use Embedded Capacitance Material. There are
> >>>> much better in most frequency but near anti-resonance point.
> >>>>
> >>>>
> >>>>
> >>>> In this case. We have to solution.
> >>>>
> >>>> 1.     Try to reduce the anti-resonance point. We need many high
> >>>> frequency
> >>>> capacitor component. That is not good because we want to reduce the
> >>>> number of capacitor component. Our purpose is reduce 70% number of
> >>>> capacitor component.
> >>>>
> >>>> 2.     Keep this anti-resonance point. That maybe have a risk if
> >>>> there is
> >>>> some noise by chance  in this frequency
> >>>>
> >>>>
> >>>>
> >>>> How about your suggestion? Please let me know if my question is not
> >>>> clear enough.
> >>>>
> >>>> Thanks
> >>>>
> >>>>
> >>>>
> >>>> Best Regards,
> >>>>
> >>>> Bruce Wu


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Scott McMorrow

Teraspeed Consulting Group LLC

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