[SI-LIST] Re: Hyperlynx vs. Signal Explorer
- From: "Todd Westerhoff" <twesterh@xxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Fri, 12 Jan 2007 10:20:08 -0500
Chris,
You and I see things pretty much the same way - the design iterates in
pre-layout until there's an "acceptable" match between the design rules and
the physical design ("acceptable" in most cases means the physical design
complies with all the rules).
Whether you perform a final post-route analysis is determined largely by how
tight your timing margins are and how easy it is to perform the post-route
analysis. If the predicted timing margins are large, performing the
post-route analysis is difficult (for whatever reason) and you have good
reason to believe the physical layout meets the constraints - then it's not
worth it.
You're right that most simulation tools, by default, make certain
assumptions - ideal return paths being one of them. I actually don't see
anything wrong with this. Simulation, by definition, is not reality.
Simulation models *always* involve approximations (it's my opinion that
anyone who maintains otherwise is either kidding their audience or
themselves). The key is knowing what behaviors the model does/doesn't
represent (and for that matter, what a given simulator does with that
information). Knowing that, you can reasonably determine what aspects of
your design a given simulation can and can't validate.
Return paths and power distribution can be modeled and simulated - albeit
with *considerably* more modeling and simulation effort. It's not that it
can't be done, it's a tradeoff between effort/cost and benefit. Whether
it's worth it depends on the user's design, tool set, and quite frankly,
skill set.
My big pitch here is simply that effective high speed design requires
keeping things in perspective. It doesn't serve any useful purpose to
demand detailed modeling of electrical effects at the picosecond level when
timing margins are at the nanosecond level. More accuracy may always be
better in the ultimate sense, but it may not be practical and
cost-effective. Good engineering gets the big picture straight first and
fills in the level of detail as required. There's no doubt that return
paths and power distribution can be critical design issues - the key is
knowing when they're important.
Remember this whole thread started (long, long ago) with a question about
entry level analysis tools - which have their place. You can think of high
speed design as a puzzle - sometimes there are a small number of big pieces
and putting the pieces together is easy, and sometimes there are lots of
small pieces and putting them together is difficult. The level of analysis
detail required is situation dependent.
I'll climb back down off the soap box now - just wanted to add my $0.01 for
keeping everything in perspective. ;-)
Todd.
Todd Westerhoff
VP, Software Products
SiSoft
6 Clock Tower Place, Suite 250
Maynard, MA 01754
(978) 461-0449 x24
twesterh@xxxxxxxxxx
www.sisoft.com
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Chris Cheng
Sent: Thursday, January 11, 2007 8:11 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Hyperlynx vs. Signal Explorer
Todd,
We are getting close. I think the difference is, as you correctly point =
out, when contrains are not met in the middle of the design. In my mind, =
going back and resimulate and change your routing rule is still =
pre-route analysis. In the sense that you are still not extracting the =
nets from the PCB but rather changing the design space and making sure =
the current or future routing still fall within the margin.=20
What I catch in post route layouts are problems like missing return vias =
when switching layers, traces running too close to plane edges or =
cutting across planes etc. What kind of hyperlynx or signal explorer =
simulations will catch those errors anyways ?
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of Todd Westerhoff
Sent: Thursday, January 11, 2007 3:53 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: Hyperlynx vs. Signal Explorer
Chris,
I agree with your point, in theory. In practice, however, I have found
post-route simulation to be useful. The trick is - post-route analysis
shouldn't become an end to itself. It should be a logical (and =
efficient)
extension of your pre-route work.
In theory, you can do you your pre-route studies and tell the PCB =
designers
what you want. If they design to those rules, you should have no =
problems.
However, what usually happens is that your initial pre-route studies are
based on an estimate of how the board will be routed, and the PCB =
designer
comes back to you halfway through routing and tells you they can't meet =
the
match length requirements because one of the other components just got =
moved
and now interferes with the routing path, or the terminators had to be =
moved
to make room for the decoupling caps, or whatever. My point is - you =
almost
never get a board routed with your first set of rules - the design =
process
iterates.
This is not necessarily a big deal. If you're organized, you can =
quickly
update your pre-route studies to accommodate the change, run the =
simulations
and determine what impact they have on interface timing. You'll then =
know
if you can afford the hit, or if you need to change your routing rules,
which require another round of simulations and timing analysis. At some
point, you'll either have updated rules, be willing to live with the =
margins
you've got, or have one of those famous discussions with the project =
manager
(at which point having your analytical ducks in order is definitely
advised).
I believe that high speed design is a triad involving timing analysis,
signal integrity and design decisions/rules (By 'decisions', I mean =
things
like "do we use termination, what values, and where", and by 'rules', I =
mean
things like pin ordering, stub lengths & lengths/length matching). =
Changing
any leg of the triad impacts the others, typically requires re-analysis =
and
may/may not require a shift in the design strategy. I maintain that =
high
speed design is iterative and having a good process for quickly "turning =
the
crank" when there is a change in the timing model/signal =
integrity/physical
design is a key to success. Knowing your experience level, I'm sure =
you're
quite good at this.
Here's my point - if it were possible to take the work you've done in
setting up your pre-route analysis, and quickly & easily leverage that =
to
perform post-route SI & timing, I'd expect you wouldn't have strong
objections. If it cost you nothing other than computer time (and not =
weeks
of it), you'd probably run it to see what would happen ... and you might
find (as others have) that the routing variations in the actual board =
didn't
fall quite the way you expected, that your clocks are quite as centered =
as
you thought they would be, and there's some margin to be had, even if =
only a
little bit, by moving your clocks.
There's a premise here - it's only worth it if post-route analysis =
doesn't
become a project unto itself. It shouldn't be a big, separate, deal - =
it
should be a natural (and automated) extension of your pre-route work.
That's not necessarily easy (and highly tool dependent) - but, in my
experience, it's been worth it.
My $0.015.
Todd.
Todd Westerhoff
VP, Software Products
SiSoft
6 Clock Tower Place, Suite 250
Maynard, MA 01754
(978) 461-0449 x24
twesterh@xxxxxxxxxx
www.sisoft.com
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