[SI-LIST] Re: Hyperlynx vs Signal Explorer
- From: "Kai Keskinen" <kalevi@xxxxxxxxxx>
- To: <hreidmarkailen@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 11 Jan 2007 17:50:59 -0500
Agathon:
It seems to me you need to spend a bit more time reading the documentation
(which can be improved) or talking to your Cadence support people to learn
how to use the tool. I too found it rather confusing at first. Hyperlynx has
a very short learning curve but does not have the same ability to analyze
many buses on a complex board in a short amount of time.
Cheers,
-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx
[mailto:si-list-bounce@xxxxxxxxxxxxx]On Behalf Of agathon
Sent: Thursday, January 11, 2007 3:52 PM
To: si-list@xxxxxxxxxxxxx
Cc: ryan.satrom@xxxxxxxxxxx
Subject: [SI-LIST] Re: Hyperlynx vs Signal Explorer
Ryan,
Can you dig it? Acutally, I'm exuming, returning rotten goodies to the
light of day. Smells great. ;-)
The acquaintance is a very knowledgeable user and the issues are with the
actual capabilities, not limited "software issues".
I'm posting the trusted comments because they echo my own experiences. If
you don't have some of the same experiences (the capabilities kind) then, by
definition, either:
a) you're not performing a full SI flow, or
b) the tool behavior depends on its environment, or
c) my version (15.7) reintroduces, or creates new, bugs.
Sorry. Maybe that's what inflames people in some of the replies, something
that impunes their self-considered "success" or project scope with the
tool.
I don't think svc bureaus do full SI flows.
This cracked me up: "Why are you commenting on something you know
absolutely nothing about?"
Yee ha... it's barn doors t' the rafters, folks.
short answer....
Uhhh... why are you commenting on my commenting when you know absolutely
nothing about what I know or don't? That much I do know. :-)
If I'm wrong, the CIA might be interested in your talents along those
lines.. how your knowledge about what people know comes about... they'd like
to know.
Bottom line... the "hearsay" quality is only helpful this way: a warning
to do the homework and be prepared with a big test case for the vendor,
knowing what your flow and output needs are beforehand. Uh, might better
validate that "preparation", too. There are unknown unknowns, indeed.
Otherwise, take the consequences. For many, ignorance is bliss. Vendors
know this.
A partial list, referring to PCB SI and Sigxp:
* excess crashes; virtual memory hog; other big apps work fine
* extraction of diffpair xnet completely failed to couple any of it, even
after controlling "min coupled length" in pcbsi prefs (which I couldn't find
docs on; finally clued in by techsupport). The pcbsi userguide refers to
the "pcb and package physical layout cmd reference" which refers to the "S
commands" doc, which simply defines the "min coupled length" without the
fact it controls diffpair extraction.
* cannot put certain model params in measurements, for ibis 4.1 at least,
like for ddr2 "ac" thresholds, for timing measurements
* if equal effort was put into the use-model as was done for the GUI and
bloated unhelpful docs, the wasted user time would be much smaller
* gui for setting up sweeps is wasteful of user time; much simpler in
hspice; lacks user control of exact cases to submit when "dialing back" # of
corners is needed (this is critical)
* cannot perform automated measurements post-sim; therefore, cannot debug
measurements w/o re-simulating -- ridiculous; therefore, need resim for any
later reformulation of measures
* silicon corner capability all messed up; leaves out typ rcv corner in
combination options (fast/slow & slow/fast); no flexibility here. Reports
mode for analysis (vs. sigxp) may do this, but it cannot do sweeps. Report
mode for generating sims seems undocumented.
* buggy diff pair extraction; fails w/ useless err msg about disconnected
component (name truncated), then works fine after topology is twiddled
* sigxp doesn't update when extraction re-done after change to prefs in
pcbsi; have to exit/reenter pcbsi
Why do you think there's a bunch of hooks to hspice?
On 1/10/07, ryansatrom <ryan.satrom@xxxxxxxxxxx > wrote:
>
> Agathon-
>
> Stop digging yourself in a hole. "Your friend" may have had a hard
> time with the software, but like Gary said, any choice between tools
> should be based on what they are used for.
>
> Why are you posting somebody else's comments anyway? Why are you
> commenting on something you know absolutely nothing about?
>
> This list is great when seeking feedback from knowledgable
> professionals. Not gossip and heresay from some anonymous email that
> one may or may not have received.
>
> Ryan Satrom
> ECT
>
> --- In si-list@xxxxxxxxxxxxxxx, agathon <hreidmarkailen@...> wrote:
> >
> > Carlos,
> > Sometimes it's better to let sleeping dogs recline, or at least
> hope for it. But you didn't. If the short answer is accurate, then
> Cadence has
> > discredited itself and impeded customer progress. Pardon my curiosity,
> but
> > does Cadence monitor this list for technical, or other,
> reasons? "Working
> > for years..." -- yes, exactly. At what? If the comments are true, then
> you
> > seek "nicety"? Uh oh.
> > Further notes from the anonymous:
> > ----------------------------
> > "My experience, too, has been that the si tools were designed without
> actual
> > & basic user needs driving it. That's not opinion or
> interpretation. It
> > 'functions' until you have some complexity and flexibility in mind. It
> also
> > crashes alot. On the same machine other large apps do not. The
> training
> > avoids the situations exposing the weak points, without 100% success,
> the
> > docs are bloated and are absent on some basics that are real capability
> > deficits (conveniently) and tech support has validated my use-model
> > concerns."
> > ----------------------------
> >
> > The dog wishes a nap.
> >
> >
> >
> > On 1/10/07, Carlos Moll <cmoll@...> wrote:
> > >
> > > Geez, not a nice way to discredit a solution in a public forum
> which has
> > > been in use and working for many years by the electronics design
> community.
> > > Perhaps some product training, ae help or support can be
> leveraged to
> > > assist with your problems or conerns.
> > > Carlos Moll
> > > Cadence Design Systems
> > >
> > > -----Original Message-----
> > > From: agathon [mailto: hreidmarkailen@...]
> > > Sent: Wednesday, January 10, 2007 12:45 PM Pacific Standard Time
> > > To: si-list
> > > Subject: [SI-LIST] Re: Hyperlynx vs Signal Explorer
> > >
> > > I recently received a comment about just this from an
> acquaintance:
> > > ----
> > > "Short answer: anyone trying to make full use of Cadence pcb si
> tools for
> > > interconnect sim and who, nevertheless, recommends it could make
> good use
> > > of
> > > counseling of some kind... or the receivers of that info could
> make good
> > > use
> > > of a polygraph test on the one recommending. All this based on
> 1st hand
> > > experience over time."
> > >
> > > ----
> > > No info on Hyperlynx.
> > >
> > >
> > >
> > > On 1/9/07, cdomeny <craig.domeny@...> wrote:
> > > >
> > > > We are considering adding a base-model (<GHz) SI tool to our
> PCB design
> > > > flow and have looked at Mentor Hyperlynx EXT and Cadence Orcad
> Sig
> > > > Explorer. In research, it seems the Cadence tool does not
> actually
> > > > perform "physical extraction", but is able to do a post-layout
> analysis
> > > > somehow. Can anyone help?
> > > >
> > > > Hyperlynx "seems" more mature, but cost ~2X. However, we are
> concerned
> > > > also about post-layout, and if Hyperlynx actually extracts the
> layout,
> > > > it seems like a more robust method.
> > > >
> > > > Any help, insight, or guidance is appreciated.
> > > >
> > > > Thanks, - Craig
> > > >
> > > > ----------------------------------------------------------------
>
>
>
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