[SI-LIST] Re: PDS analysis?

  • From: "Bowden, Ivor" <ibowden@xxxxxxxxxxxxxxxxx>
  • To: "Dan Smith" <Dan.Smith@xxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Fri, 28 Mar 2008 18:03:22 -0700

Dan,

Thank=20you=20for=20your=20reply.=20I=20know=20there=20have=20been=20studi=
es=20contrasting=20lower=20value=20caps=20with=20via=20inductance.=20Are=20=
there=20cases,=20with=20adjacent=20thin=20dielectric=20power=20-=20gnd=20s=
tickups,=20where=20changing=200.1uF=20ceramic=20bypass=20caps=20to=20lower=
=20values=20solved=20cases=20of=20dysfunctional=20operation?

-Ivor

-----Original=20Message-----
From:=20Dan=20Smith=20[mailto:Dan.Smith@xxxxxxxxx]=20
Sent:=20Friday,=20March=2028,=202008=208:56=20AM
To:=20Bowden,=20Ivor;=20si-list@xxxxxxxxxxxxx
Subject:=20RE:=20PDS=20analysis?

Ivor,

With=20what=20you=20described=20below=20there=20could=20be=20problems.=20=20=
These=20problems=20would=20be=20manifested=20as=20noise=20ripple=20on=20yo=
ur=20VCC=20planes=20which=20will=20eat=20into=20your=20margins=20budget=20=
for=20Vih=20and=20Vil=20of=20your=20devices.=20=20By=20placing=20only=200.=
1uf=20capacitors=20and=20no=20other=20values,=20you=20have=20only=20minimi=
zed=20your=20noise=20on=20your=20power=20planes=20at=20about=2010mhz.

You=20can=20never=20eliminate=20your=20parallel=20resonance=20but=20adding=
=20additional=20capacitors=20will=20lower=20the=20overall=20inductance=20o=
f=20the=20mounting=20capacitors=20which=20(when=20intersected=20with=20you=
r=20plane=20capacitor)=20will=20lower=20the=20impedance=20holes=20somewhat=
=20and=20move=20them=20out=20higher=20in=20frequency.=20=20But=20again,=20=
they=20will=20never=20be=20eliminated.

You=20should=20use=20more=20capacitor=20values=20for=20sure.

Dan

-----Original=20Message-----
From:=20si-list-bounce@xxxxxxxxxxxxx=20[mailto:si-list-bounce@xxxxxxxxxxxx=
g]=20On=20Behalf=20Of=20Bowden,=20Ivor
Sent:=20Friday,=20March=2028,=202008=207:24=20AM
To:=20si-list@xxxxxxxxxxxxx
Subject:=20[SI-LIST]=20PDS=20analysis?

Hi=20SI=20Experts,


Say=20you=20have=20a=20typical=20PCB=20with=20modern=20technology=20mix=20=
of=20CPU,=20DSP,=20DDR,=20GIGE,=20PCIE,=20etc.=20Say=20it=20is=20a=20multi=
-layer=20stackup=20in=20the=20form=20of=20GND-SIG-SIG-GND=20sets,=20with=20=
the=20power=20distribution=20centered=20in=20the=20stackup=20as=20solid=20=
ground=20plane=20-=20split=20power=20plane=20-=20split=20power=20plane=20-=
=20solid=20ground=20plane,=20using=201oz=20copper=20and=203.5=20mil=20diel=
ectric.=20Assuming=20the=20split=20power=20planes=20utilize=20sufficient=20=
area=20to=20keep=20the=20point=20to=20point=20inductance=20and=20resistanc=
e=20to=20reasonable=20values,=20and=200.1uF=20ceramic=20bypass=20caps=20ar=
e=20evenly=20placed=20at=20device=20pins,=20and=20bulk=20capacitance=20is=20=
placed=20as=20needed,=20would=20there=20be=20reason=20to=20expect=20any=20=
problems,=20such=20as=20plane=20resonance,=20etc?=20If=20so,=20what=20woul=
d=20be=20the=20observable=20real=20world=20manifestations,=20in=20terms=20=
of=20circuit=20performance=20and=20power=20pins=20scope=20waveforms?=20Wou=
ld=20there=20be=20significant=20advantage=20to=20analyzing=20this=20PDS,=20=
or=20should=20following=20this=20"industry=20standard=20practice"=20for=20=
PCB=20PDS=20be=20sufficient=20to=20expect=20robust=20behavior?



Thanks,



Ivor=20Bowden

Senior=20Hardware=20Engineer

Curtiss-Wright=20Controls=20Embedded=20Computing

10201=20Wateridge=20Circle

Suite=20300

San=20Diego,=20CA=2092121

858-452-0020=20x=204405

ibowden@xxxxxxxxxxxxxxxxx




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