Chris, Chris: Remember Chris Rule B , providing enough The signal consist of the signal trace AND its return path. While your = driver may not be switching, the return path that is most likely shared = between multiple drivers may not.=20 A classic example is your processor FSB or DDR1/2/3 during a write = cycle. The DQS is switching between the DQ data packet. While your DQS = may be quiet and not switching, the entire DQ bus can be switching and = raise or drop your return path high or low or ring like a gong. Your DQS = will not be in a steady state of voltage. Steve: We agree that a contiguous return path is a good practice, ( Chris' Rule B ). However, while a contiguous return path removes the PDN impedance / noise from the signal path, it does not guarantee any particular limit to SSO. Chris: Agree and the decoupling will be done by either I/O decoupling cap on = die or the plane capacitance of the reference plane that sandwich the = signal combined with the proper via that switch together with the signal = when it entires or leave a reference plane. Steve: I am OK with you up to the point that you assume that the PDN sandwiches the signals. The power delivery is separate from the signal propagation. In the case of a 4/6 layer DDR we would reference DQ lnes to Vss and address and control to Vcc without running any inside a Vss / Vcc cavity. At a minimum the signals that reference the far plane penetrate the cavity at least once, and excite it. For signals that penetrate a cavity, maintaining continuity through the cavity reduces the amount of energy injected. As soon as we drop a signal via down we lose TEM and all manner of interesting things happen. Even when we map return vias 1:1 w/ signal vias we do not eliminate the discontinuity. We just make it smaller. Until the day that the mythical coaxial via and matching lossless transitions are invented the best that we can do is to reduce the energy loss to acceptable levels through good path design which includes the signal and return via designs. Certainly no nearby vias at all will result in far more energy injection into the cavity than some number of vias. Scott spends lots of time optimizing such structures for very high performance. Best Regards, Steve Chris Cheng wrote: thread way too long and getting hard to follow, snip -- Steve Weir Teraspeed Consulting Group LLC 121 North River Drive Narragansett, RI 02882 California office (408) 884-3985 Business (707) 780-1951 Fax Main office (401) 284-1827 Business (401) 284-1840 Fax Oregon office (503) 430-1065 Business (503) 430-1285 Fax http://www.teraspeed.com This e-mail contains proprietary and confidential intellectual property of Teraspeed Consulting Group LLC ------------------------------------------------------------------------------------------------------ Teraspeed(R) is the registered service mark of Teraspeed Consulting Group LLC ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu