[SI-LIST] Re: package SSN model accuracy requirements
- From: steve weir <weirsi@xxxxxxxxxx>
- To: "Mirmak, Michael" <michael.mirmak@xxxxxxxxx>, <gary_pratt@xxxxxxxxxxx>, <Chris.Cheng@xxxxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Fri, 11 Mar 2005 17:56:06 -0800
Michael, you are very welcome. I just don't know any easy way to get past
this chicken and egg problem. Widespread Si vendor support tends to want
to wait for OEM customer pull. OEM customers won't pull without Si vendor
support, and tools in-place. Consequently, OEM customers hesitate to
purchase tools for specific capability that doesn't get used. And tool
vendors sure don't have a monetary incentive to give away new capability
for free. It seems this places us at something of an impasse.
Just brainstorming a little bit, what it might take is for the tool vendors
to essentially provide both tools and support to the Si industry gratis so
that the libraries get built. With libraries in place that can be
demonstrated provide value, OEMs would be far more inclined to purchase the
tools to use AMS. Maybe if the industry could convince the US DoD that AMS
is necessary for advanced military H/W, we could plow some gov't dollars
into this effort to prime the pump. If funds were provided to Si vendors
with the specific requirement that silicon has to be delivered with AMS
models that match SPICE accuracy, we might get somewhere.
Regards,
Steve.
At 05:42 PM 3/11/2005 -0800, Mirmak, Michael wrote:
>Steve et al,
>
>Thanks for your comments and for visiting the IBIS Summit presentation
>site.
>
>While I cannot comment on specific vendors' tools, I do have a few
>general observations about IBIS and SPICE in the industry.
>
>Discussions about SPICE versus traditional IBIS versus IBIS with AMS may
>be missing a larger point: as is apparent from this thread alone, not
>everyone is convinced that behavioral modeling can be more compelling
>than transistor-level modeling for certain applications. We -- EDA
>vendors, system designers and silicon vendors, as you point out -- need
>to review and demonstrate publicly that proper behavioral modeling *per
>se* can have significant advantages over transistor-level solutions,
>particularly proprietary ones.
>
>I personally believe that behavioral modeling can provide the speed and
>accuracy required by the industry for large system simulations. I
>further believe that behavioral modeling, if approached with an eye
>toward flexibility and standardization, can ease some of the information
>exchange, feature support and correlation issues mentioned earlier.
>
>Will behavioral modeling specification extensions and improvements be
>needed as designs advance? Certainly. However, as an example, I would
>offer that BSIM is not exactly static; it has been updated and changed
>regularly, as effects considered unimportant become more prominent.
>Further, BSIM and proprietary SPICEs are themselves behavioral model
>sets for transistor devices -- behavioral modeling at a lower level of
>abstraction, in other words. Some semiconductor vendors even use their
>own internal transistor model equation sets for their own needs, beyond
>what commercial tools or BSIM can offer.
>
>Is there a barrier to switching to abstract behavioral approaches?
>Definitely. In many cases, the barrier is as Chris pointed out --
>low-level design and layout teams tend to use SPICE-oriented tools, and
>netlist extraction/encryption takes less effort (and know-how) than
>creating a correlated behavioral model. Again, we need to demonstrate
>that the advantages of more abstract behavioral modeling approaches
>justify the time needed to create and correlate those models. Once that
>is demonstrated, the more specific choices regarding behavioral modeling
>styles and features become easier to make.
>
>The IBIS 4.1 specification supports the VHDL-AMS and Verilog-AMS
>languages plus Berkeley SPICE. The IBIS community is now hard at work
>developing models and modeling techniques using these languages, plus
>analyzing other behavioral modeling proposals to address the issues
>above. We are trying to "make the case" for behavioral modeling and to
>offer accurate, standard solutions in the near term. Your input is
>welcome, particularly on how best we can make that case to the industry.
>We can use all the help we can get in this. :)
>
>- Michael Mirmak
> Intel Corp.
> Chair, EIA IBIS Open Forum
>
> http://www.eigroup.org/ibis/
> http://www.eda.org/ibis/
>
>
>-----Original Message-----
>From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
>On Behalf Of steve weir
>Sent: Friday, March 11, 2005 1:35 PM
>To: gary_pratt@xxxxxxxxxxx; Chris.Cheng@xxxxxxxxxxxx;
>si-list@xxxxxxxxxxxxx
>Subject: [SI-LIST] Re: package SSN model accuracy requirements
>
>Gary, I was looking at the IBIS Summit information, and a couple of the
>presentations make it apparent that compliance and usage beyond 2.0 is
>poor. Cadence in particular did a survey that showed that SPICE is
>taking
>a lot of ground from IBIS because the IBIS world has not provided the
>models needed for OEMs to get their jobs done. I guess this all sounds
>great if you're Synopsys.
>
>I think that if this situation is to reverse, it is going to require
>some
>real courage and $$$ from: tool vendors, silicon vendors, and OEMs to
>get
>over the hump and make IBIS w/AMS something that reverses the trend
>towards
>SPICE. How will Mentor and Cadence convince Synopsys to play when the
>current trend favors Synopsys? Who is going to champion this at the IC
>vendors when their customers almost universally have H-SPICE capability
>and
>not a spiffy 4.1+ compliant IBIS tool with engineers trained and willing
>to
>use it?
>
>Don't get me wrong, I like the reported results of AMS and the benefits
>it
>brings. I just see a major set of market hurdles.
>
>Regards,
>
>
>Steve.
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