[SI-LIST] Re: package SSN model accuracy requirements

  • From: "lgreen" <lgreen22@xxxxxxxxxxxxxx>
  • To: <gary_pratt@xxxxxxxxxxx>, <ray.anderson@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
  • Date: Wed, 9 Mar 2005 20:17:03 -0800

SSO and PDS simulations require modeling both the I/O buffer and the
package.  The package has received a lot of attention in this thread, so I
will just add a few comments on the I/O buffer model limitations. ;-)

IBIS 3.2 can be used for SSO/PDS simulations if one makes "reasonable"
assumptions for I/O buffer characteristics as a function of voltage.  One
such assumption could be that currents in the I-V tables scale approximately
linearly between corners. The simulation results will be as good - or bad -
as one's starting assumptions.

To get improved SSO/PDS simulation accuracy, a functional/behavioral I/O
model that incorporates voltage and temperature effects is needed.
Alternatively, one can use structural (transistor-level) circuit models (but
that is what IBIS was designed to get around in the first place).

A few of us on the reflector have written *-AMS  models.  Arpad Muranyi and
I have each posted models as part of IBIS Summit papers.
For those just ramping up, training on creating *-AMS models is available
from a number of companies.

- Lynne

"IBIS training when you need it, where you need it."

Dr. Lynne Green
Green Streak Programs

-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On
Behalf Of Pratt, Gary
Sent: Wednesday, March 09, 2005 5:40 PM
To: ray.anderson@xxxxxxxxxx; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: package SSN model accuracy requirements

Actually, there was one irreverent poster who was saying SSO could be
done with IBIS (as it stands today).  That is assuming one can generate
an accurate (causal, passive, etc) s-parameter model for an appropriate
section of the package (with say, up to perhaps 200 ports). =20

IBIS 4.1 with IEEE standard 1076.1 provides all the facilities one would
need to create an IBIS standard model which would simulate supply
current and driver output characteristics to any level of accuracy
desired.  Couple this with an SI tool that accepts large s-parameter
models, and I believe you are ready to roll. =20

Couple this with silicon configuration software that can write an IBIS
4.1 file, and one has the makings of an easy to use application for SSO
analysis. =20


-----Original Message-----
From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
On Behalf Of Ray Anderson
Sent: Wednesday, March 09, 2005 10:48 AM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: package SSN model accuracy requirements


I think you may be misinterpreting what Lynne and the other posters in
this thread have been discussing so far.

No one seems to be saying that SSO simulations should be done with IBIS
(as it stands today).

The discussion is centered around the various package models. An IBIS
model consists of the silicon model portion and the package model
portion. One can take the package model portion (that is described in
IBIS syntax) and rewrite it in Spice syntax if you so desire. So while
some of the statements earlier in the thread may have referenced "IBIS
lumped models" and "IBIS ICM" models, the crux of the discussion is
related to model topologies, model complexity, model bandwidth, and
model size where the "model" in question is the package model. All of
these model attributes are relevant to SSO simulations regardless of
what you choose as the silicon driver model.


Chris Cheng wrote:

>You can say what you want with IBIS, at the end of the day (today, not=20
>tomorrow or some future spec), can you do an SSO analysis based on a=20
>pure IBIS model ?
>I am a complete N00b on FPGA so I am curious how many people really do=20
>SSO analysis with just a standard IBIS description of a chip. I can't,=20
>so please tell me how you did it.
>Those who know me and my previous life somewhere should remember some=20
>of those reference SPICE SSO models I generated, there is only a small=20
>number of SPICE drivers, interconnect and receivers set that need to be

>included to accurately model SSO, x-talk, package/interconnect loss.=20
>Remember, m=3Dx is a very powerful macro that doesn't even need to be =
>Another interesting side note, some of the so call speedy "IBIS=20
>engines" end up barely faster or even slower in some cases when the=20
>same interconnect complexity is added to get the accuracy close to
acceptable level.
>All of the above SSO modelling methodolgies are well documented and=20
>correlated with actual characterization numbers. I am not talking about

>vaporware analysis here.
> =20

Raymond Anderson
Senior Signal Integrity Staff Engineer
Product Technology Dept.
Package Engineering Group
Xilinx Inc.

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