Hi Dan Yes, the KISS mixer works just fine in the Minima....This thread is all about working out the advantages of the KISS mixer with FETs and bias over a more normal diode ring mixer; or I think that's it - if I remember correctly that far back :-).
Mark G0MGX On 03/03/2014 19:05, Dan Reynolds wrote:
OK, the $3000 question does the mixer work though? All of you guys are W-A-Y over my head. I just want to know if it works. I know I'm being simplistic but I'm a simple homebrewer... 73 Dan -- KB9JLO https://sites.google.com/site/on30ng/On Mon, Mar 3, 2014 at 12:18 PM, Mark G0MGX <mark.g0mgx@xxxxxxxxx <mailto:mark.g0mgx@xxxxxxxxx>> wrote:So for more confusion, please see: http://g0mgx.blogspot.co.uk/2014/03/more-mixer-musings.html M On 03/03/2014 06:51, Mark G0MGX wrote:I certainly can and will report back.... M On 03/03/2014 04:09, Ashhar Farhan wrote:Mark and the gang, What was the level of the 5 MHz signal into the mixer? It looks like it was quite a strong one. I am a little confused. 1. The first picture at http://2.bp.blogspot.com/-kIK-jtP4zAs/UxDN3oyTR-I/AAAAAAAAFps/DnpUkVjtnro/s1600/LO+Only.png shows the local oscillator at the IF port with -10dbm output. What was the input level at the gate? it should be around 3 v peak-to-peap to drive the J310s from pinch-off to full-on. 2. In the second picture with the RF signal at 5 Mhz, (http://2.bp.blogspot.com/-NGDTM1XUkXU/UxDOB-QrjYI/AAAAAAAAFp0/sRNKTvuGntA/s1600/LO+15M+RF.png) we see that a peak at 15 MHz that is 0 dbm! this is quite a high level (more than 1 v peak). At this level, the IIP3 will substantially contribute to the harmonic distortions. Can you repeat these tests with the RF signal set to a much lower level? Let's say around -20dbm? - f On Sun, Mar 2, 2014 at 3:11 AM, Joshua Blanton <jtblanton@xxxxxxxxx <mailto:jtblanton@xxxxxxxxx>> wrote: Hello Mark and group, I actually built this mixer a week-ish ago, and threw it up on the bench for some testing - unfortunately, I did my testing on equipment at work, and don't have my notes with me here, but I can speak to the grounded-source behavior, I think. As a bit of background, I'm using 2SK192A-BL JFETs, because I have a large supply of them in my junkbox; these will have lower max Idss, but I'm seeing 9dB conversion losses so I'm not losing sleep over it - what's 3dB of loss from ideal among friends? I also matched the two FETs I used for Vpinchoff, but did not match for Idss, under the (possibly/probably mistaken) belief that pinchoff is more critical to balance in this system. I must also explain that I only built the mixer, and tested with two HP8640B generators for the LO and RF/IF ports, looking at the other port with a spectrum analyzer. I built the mixer to be a 6m-to-20ishMHz down-conversion, so my harmonics and their mixer products were not nearby, and I didn't look at them in detail. If you ground the sources, your input LO swing is going to cause the FET gates to conduct as diodes, which will not be ideal from a noise figure point of view (I believe - that's my understanding, anyway, and it makes sense to me, I think). Ideally you swing your gate voltage from pinch-off (FET dependent) to *just* below conduction (a diode-drop, so call it 0.6-0.7V), for your best variation in impedance; that's really the goal of the FET. In an ideal world the pinch-off state would conduct nothing, and the on-biased state would have 0 impedance, and thus switch the signal hard-on and hard-off; also ideally the transition from one state to the other would be instantaneous. In my mixer, for some reason (that I did not explore enough to explain here) my bias circuit was causing the mixer to massively increase conversion losses, if I applied any bias at all, so I'm actually running my mixer with no bias but include a 4.7k resistor to ground. I haven't ever measured the voltage on the source, but I assume that it's floating up some level based on LO drive and the Vgs conduction voltage... I believe that my gates are conducting to generate this potential, which again is not ideal from a mixer noise figure perspective. Most of my measurements were looking at port-to-port leakage and conversion losses, but I can toss it back up on the test bench and look at some of these other parameters next time I have a minute at lunch. Next time I measure, I'm going to re-read the section on mixer analysis in EMRFD, so that I take better measurements :-) All in all, this is a neat mixer - it appears to be robust (I did not see compression on 0dBm input signals from RF->IF or IF->RF), and is certainly simple. I look forward to playing with it more as I have time. Josh, KB8NYP On Sat, Mar 1, 2014 at 5:04 AM, Mark G0MGX <mark.g0mgx@xxxxxxxxx <mailto:mark.g0mgx@xxxxxxxxx>> wrote: Hi Team Thanks to everyone that joined this discussion; my first conclusion after reading all the replies was that it seemed my pair of FETs were far from matched. Rather than trying to match two I simply swapped one of them for another one out of the FET draw.... the results are quite different. I've updated the page here: http://g0mgx.blogspot.co.uk/2014/02/kiss-mixer-musings.html but really I am finding little or no difference with 1 bias pot, two separate bias pots or just grounding the sources - the results are almost identical as far as I can see. In my test setup I have a 20M signal into the LO port, 15MHz into the RF and therefore am wanting either the 20-15 = 5MHz signal or the 20+15 = 35Mhz signal. Under all combinations of bias setup I can alter the amplitude of the _unwanted_ signals, but make no difference to the _wanted _signals - they remain the same under all conditions. Mark G0MGX On 01/03/2014 05:45, pakdeDar wrote:Other questions to the experienced builder here according to the j310 used as KISS Mixer : 1. An article in the internet state that J310 was symmetric, symbolized by gate in the center between source and drain. On the contrary other article say that j310 was NOT symmetric. Q : what is the effect to interchange source and drain ? Could it be noticed clearly by ear ..our most sophisticated ham equipment Gift by our Creator ? I take simple solution for this case ..Just refer to the pin outline, wire the source to the common side and drain to the hot side. Am I correct ? 2. Is it possible to set jfet bias to 50 pct of and 50 pct on as Dan say using simple equipment such as DVM ( and ear setting of course ) but not using scope ? If yes, how ? I am interested to the spirit of KIS and N(ot) C(omplicated)...always remember Ham's spirit " Better to measure than not to measure " ( even using simple-homebrewed equipment ) Sudarmanta - YC1DCN Send from my TelakaspaBerrylayauw ® -----Original Message----- From: Joe Street<jstreet@xxxxxxxxxxxx> <mailto:jstreet@xxxxxxxxxxxx> Sender:minima-bounce@xxxxxxxxxxxxx <mailto:minima-bounce@xxxxxxxxxxxxx> Date: Fri, 28 Feb 2014 23:20:37 To:<minima@xxxxxxxxxxxxx> <mailto:minima@xxxxxxxxxxxxx> Reply-To:minima@xxxxxxxxxxxxx <mailto:minima@xxxxxxxxxxxxx> Subject: [minima] Re: KISS Mixer Musings SST/U401 VGSth matched to within 5mv On 28/02/2014 11:13 PM, Joe Street wrote:Why not look for a monolithic pair? If they are fabricated on the same substrate the characteristics should be well matched. I haven't looked but surely there must be something off the shelf? On 28/02/2014 7:54 PM, Tayloe, Dan (NSN - US/Tempe) wrote:We need to bias the jfet channel for 50% on, 50% off. When a jfet is "on", it grounds its winding with its phasing for RF to IF transfer. Alternating jfets flips the signal to the opposite polarity. Rapidly flipping the signal polarity through this stage at the LO rate does the mixing. Thus there is no DC current, but we are trying to turn on/off AC paths. Since jfet pinch off thresholds vary so much from device to device, separate bias is best. As a matter of fact, if you had a bunch of these, it would be nice to match Idss and pinchoff voltage for these two jfets. - Dan Sent from my Windows Phone -----Original Message----- From: ext Joe Street Sent: 2/28/2014 5:10 PM To:minima@xxxxxxxxxxxxx <mailto:minima@xxxxxxxxxxxxx> Subject: [minima] Re: KISS Mixer Musings These FETs are not really 'biased' in the normal sense anyways because the drains are open circuit for DC so there is no bias current flowing. What you are doing is raising and lowering the potential of the whole channel. Variation in the device fabrication processes result in device to device variance in transconductance so perhaps in this strange circuit balance is more important?? On 28/02/2014 4:58 PM, Tayloe, Dan (NSN - US/Tempe) wrote:That might change the balance of the mixer, but does not change the bias on each gate. - Dan -----Original Message-----From:minima-bounce@xxxxxxxxxxxxx <mailto:minima-bounce@xxxxxxxxxxxxx> [mailto:minima-bounce@xxxxxxxxxxxxx] On Behalf Of ext Sandeep LohiaSent: Friday, February 28, 2014 2:56 PM To:minima@xxxxxxxxxxxxx <mailto:minima@xxxxxxxxxxxxx> Subject: [minima] Re: KISS Mixer Musingshttp://4.bp.blogspot.com/-fIABMtTpyUE/Ut9yfPotc0I/AAAAAAAAAUQ/IG6TveVonrw/s1600/under+R&D.jpgNOTE : not yet tested live...IF you have two separate bias pots, You could bias the two JFETs with separate pots and adjust for similar drain Just thinking about this. I remember that the transconductance of JFETS varies quite a bit so the fact that the signals are not symetrical might be due to an imbalance in the device characteristics?Please take a look at the link and then any volunteers who can try and explain this to me most welcome!