[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

  • From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx,"Vishram Pandit" <vishrampandit@xxxxxxxxxxx>
  • Date: Tue, 12 Aug 2003 09:25:16 -0700

Ah!  The key here is double sided PCBs.  That means no plane capacitor,
which a part of the UMR test.  Problem with double sided PCBs is the
absence of planes to tie things together.  This does make EMI with fast
edge parts very difficult, if not impossible to control.  In this case,
capacitor placement does matter because there is a great deal of inductance
in the power path due to the lack of planes.  As part of this, it is very
tough to make the circuit stable at high speeds, as well.

When we tried to make NICs using double sided PCBs at 3COM for fast
Ethernet, we had this very problem.  Just barely worked.  When we added
encryption, didn't work at all.  Too many data lines switching
simultaneously.

Lee

Lee Ritchey
leeritchey@xxxxxxxxxxxxx
Why Wait?  Move to EarthLink.


> [Original Message]
> From: Vishram Pandit <vishrampandit@xxxxxxxxxxx>
> To: <si-list@xxxxxxxxxxxxx>
> Date: 8/11/2003 3:21:05 PM
> Subject: [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator
>
>  
> I agree with Ray. I have found in my designs that the EMI is very much
> dependent on the decoupling capacitor placement. Typically I can place the
> decoupling capacitors with the PDS analysis. Also, I can find
> experimentally,the hot-spots and place the capacitors. With simulations
and
> with measurements, I have found that the decoupling capacitor placement is
> very critical. It may be in a particular section of the board, it may be
at
> the bottom (for double sided boards) .... it all depends on the nature of
> theproblem. 
>
>
> Thanks, 
>
> Vishram
> >From: Ray Anderson >Reply-To: si-list@xxxxxxxxxxxxx >To:
> si-list@xxxxxxxxxxxxx >Subject: [SI-LIST] Re: UltraCAD ESR and Bypass
> Capacitor Caculator >Date: Mon, 11 Aug 2003 09:36:25 -0700 >>>>Lee Ritchey
> wrote: >>If the location of decoupling capacitors matters, perhaps some
> technical >>demonstration would prove that. Short of such a demonstration,
> this is >>speculation and not the sort of thing that should be used to
make
> design >>choices. >>>>It's time to do some good engineering on this
subject
> and do away with >>opinion. The UMR paper is good engineering. Anyone who
> chooses to >>disagree with it has the burden of showing where it is wrong
by
> using some >>good science. >>>>Lee >>>>Lee Ritchey
> >>leeritchey@xxxxxxxxxxxxx>>Why Wait? Move to EarthLink. >>>Or conversely,
> show that it doesn't matter. >>Take a large system board (say about 24"
> square) put a bunch of high current >processors and ASICS on the left side
> ofthe board. Put all your decaps >on the right side of the board (since
you
> maintain position doesn't matter). >>In this hypothetical case I can just
> about guarantee the board won't function >properly or pass EMI.
Admittedly,
> it is a contrived case, but I think it >illustrates the point. >>As far as
> the technical demonstration goes, we have indeed demonstrated to
>ourselves
> that position does matter. >>I'm not attempting to further an argument,
but
> Ido feel those who have >responded with viewpoints other than yours
> shouldn'tbe chastised and accused >of spreading unfounded opinion. Don't
> discount the chance that an opinion that >differs from yours just might be
> correct. >>-Ray Anderson >Sun Microsystems Inc.
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