[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

  • From: "Abe Riazi" <ariazi@xxxxxxxxxxxxxxx>
  • To: "'si-list@xxxxxxxxxxxxx'" <si-list@xxxxxxxxxxxxx>
  • Date: Tue, 5 Aug 2003 10:17:57 -0700

Dear Zhangkun:
What tool did you use for your power noise simulations?
How close (relative to the associated component) did you place the decoupling 
caps?

Thank you.

Abe

-----Original Message-----
From:   Zhangkun [SMTP:zhang_kun@xxxxxxxxxx]
Sent:   Monday, August 04, 2003 8:58 PM
To:     si-list@xxxxxxxxxxxxx
Subject:        [SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

Dear All:

In our simulation and measurement, we found that power noise of at least 400MHz 
could be decoupled by discrete caps. The placement DOES matter the impedance of 
PDS. The current problem is the anti-resonance between different kinds of caps.

Best Regards

Zhangkun

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