[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

  • From: Mike Mayer <mwmayer@xxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: 03 Aug 2003 14:02:48 -0500

On Fri, 2003-08-01 at 14:50, Ray Anderson wrote:
> With all due respect to the UMR authors, I think the location
> of a decap on a set of power planes DOES matter.

[...]

And the UMR authors agree. From the Summary of their paper*:

"A lumped element model has been developed for decoupling on a
multilayer PCB. The model is valid for frequencies below the distributed
resonances of the power bus, which for PCBs on the order of 6-10" is
approximately 200-300MHz."

and

"Experimental results show that the location of the decoupling capacitor
is not critical to performance in the frequency range below several
hundred megahertz (where a lumped element model is valid)."

*Drewniak, J.L., Hubing, T.H. et al, Modeling Power Bus Decoupling on
Multilayer Printed Circuit Boards, 1994.


-- 
=============================================================================
Mike Mayer
mwmayer@xxxxxxx


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