[SI-LIST] Re: UltraCAD ESR and Bypass Capacitor Caculator

Perhaps there are lots of people who would like to see the response. I hope
that they will be directed to the entire list.

Regards,

Paul
__________________

Abe Riazi wrote:
> Dear Lee,
> Please recall that when I was attending your course, we had a brief
> discussion regarding the UltraCAD's ESR and Bypass Capacitor Calculator.
> 
> I have purchased a license of the program (it costs $75.00).
> 
> The program can help to determine the  optimum
> number (and values) of bypass capacitors required for a high-speed design 
> board.
> 
> Douglas Brooks has written a paper, "ESR and Bypass Capacitor Self Resonant 
> Behavior How to Select Bypass Caps" which describes how to apply
> the calculator.  One point emphasized by his paper is that to achieve
> optimum decoupling one needs to use a range of values of decoupling
> caps (example, some 1uF caps, some 0.1uF caps, some 0.01uF caps
> with low ESL) rather than just a single value of capacitor. The objective
> being to produce a flat low PDS impendace over a specified broad frequency
> bandwidth.
> 
> On the other hand, I have noted that many engineers have a different
> view in that they believe a SINGLE value of capacitor
>  (such as 0.1uF  0603 (or 0805) package with X7R dielectric ceramic chips)
> should be used for ALL high frequency decoupling capacitors on the PCB.
> 
> The UltraCAD calculator does not provide any information related
> to the best required location for the decoupling caps.
> 
> The calculator also does not account for the distributed nature
> and frequency dependent loss of power planes (which can be
> important at frequencies exceeding 100 MHz.)
> 
> Subsequently, it seems to me that UltraCAD ESR and Bypass
> Capacitor Calculator can be a useful tool for learning and
> experimenting with various decoupling strategies, but
> probably lacks the accuracy that the Cadence PDS tools
> can offer (of course, the Cadence PDS tools are also significantly
> more expensive).
> 
> I also have two questions:
> 
> 1. In your opinion, in order  to achieve optimum high frequency
>  decoupling, is it necessary to use several different
> values of ceramic caps (e.g. some 1.0 uF, some 0.1uF
> some 0.01uF ceramic chips) or is it preferable to use just a 
> single value (such as 0.1uF) for ALL the decoupling caps on the PCB ?
> 
> 2. Is it sufficiently accurate to determine the optimum location of 
> decoupling caps by applying
> rules of thumb or is it necessary to simulate?
> 
> Thank you in advance for your reply.
> 
> Abe
> 
> 
> 
> 
> 
> 
> 
> 
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> 
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-- 
Paul Levin
Senior Principal Engineer
Xyratex Storage Systems

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