[SI-LIST] Re: termination for routing 8 SDRAMs to single Processor
- From: "Dimiter Popoff" <dp@xxxxxxxxxxx>
- To: <si-list@xxxxxxxxxxxxx>
- Date: Thu, 11 Aug 2005 10:07:21 +0300
So you have seen many prototypes which operated continuously
for about 4 years and exhibit problems once they go into mass production.
Well, kucky me. I had no problems.
Dimiter
------------------------------------------------------
Dimiter Popoff Transgalactic Instruments
http://www.tgi-sci.com
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-------Original Message-------
> From: Kenneth W. Egan <kegan@xxxxxxxxxxxxx>
> Subject: RE: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> Processor
> Sent: Aug 11 '05 09:47
>
> ??
> Depends upon the characterization of the silicon on both sides. So it’s a
> statistics thing. How many units have you shipped ? This is the determining
> factor, not one unit for a period of time.
>
> Overshoot is an issue for many silicon vendors. For example, one of TI's
> DSP's call out max of 4.3v overshoot for 3.3v I/O on their SDRAM I/F. But
> the real piece is the spec that indicates, not only 4.3v, but also only over
> a max of 30% of the clock period. So this may indicate junction
> heating/oxide breakdown issues with the process node, or design of their
> device.
>
> I've seen plenty of prototypes that work fine, put them in mass production,
> and these issues start cropping up.
>
> KWE
>
> -----Original Message-----
> From: Dimiter Popoff [mailto:dp@xxxxxxxxxxx]
> Sent: Thursday, August 11, 2005 12:56 AM
> To: Kenneth W. Egan; aavinda12@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> Subject: RE: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> Processor
>
> Is about 4 years practically continuous operation good enough?
> The design has demonstrated it.
>
> Dimiter
>
> ------------------------------------------------------
> Dimiter Popoff Transgalactic Instruments
>
> http://www.tgi-sci.com
> ------------------------------------------------------
>
>
>
>
> -------Original Message-------
> > From: Kenneth W. Egan <kegan@xxxxxxxxxxxxx>
> > Subject: RE: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> > Processor
> > Sent: Aug 11 '05 05:21
> >
> > The question might not be one of stability, but one of reliability in
> > the long term. Sure, you'll probably meet setup and hold to/from the
> SDRAM.
> > However, SDRAM typically has some pretty hot drivers (that I've seen,
> > simulated and measured in circuit ) and the real issue is over
> > stressing The input protection on the receiver, i.e. overshoot issues.
> >
> > Failure modes in this case may not occur until much later in time.
> >
> > KWE
> >
> >
> > -----Original Message-----
> > From: si-list-bounce@xxxxxxxxxxxxx
> > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Dimiter Popoff
> > Sent: Wednesday, August 10, 2005 8:00 PM
> > To: aavinda12@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> > Subject: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> > Processor
> >
> > I have rooted 8 x8 SDRAMs to an 8240 without any terminations and it
> > worked remarkably stable. However, I had 64 data bits rather than 32.
> > I had put 4 SDRAM chips on top and 4 on the bottom of the board,
> > practically next to the CPU, no connectors between.
> >
> > Dimiter
> >
> > ------------------------------------------------------
> > Dimiter Popoff Transgalactic Instruments
> >
> > http://www.tgi-sci.com
> > ------------------------------------------------------
> >
> >
> >
> >
> > -------Original Message-------
> > > From: Aravnda G <aavinda12@xxxxxxxxx> > Subject: [SI-LIST]
> > termination for routing 8 SDRAMs to single > Processor > Sent: Aug
> > 11 '05 03:29 > > Hi All, > I am working with a micro-processor
> > conneted to 8 SDRAM with 12 address lines to all SDRAMs and 32 data
> > lines each to two sets of four SDRAMs. I was wondering if anyone has
> > managed to route this sort of topology without using terminations. If
> > so please send information on topology used. The IO are lvttl
> > compatible at 3.3V. Any input on routing possibilities is welcome.
> > >
> > > Thanks & Regards,
> > > Alex.
> > >
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