[SI-LIST] Re: termination for routing 8 SDRAMs to single Processor
- From: "Dimiter Popoff" <dp@xxxxxxxxxxx>
- To: steve weir <weirsi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Thu, 11 Aug 2005 09:30:46 +0300
Only the PCI pins are specified to up to 5.5 V input voltage.
The rest are specified at max. 3.3V. (Memory might be 2.5 V max.,
separate power, which in my case is 3.3V - cut and "jumper solder"
selectable to 2.5, but this feature has never been used).
Dimiter
------------------------------------------------------
Dimiter Popoff Transgalactic Instruments
http://www.tgi-sci.com
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-------Original Message-------
> From: steve weir <weirsi@xxxxxxxxxx>
> Subject: Re: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> Processor
> Sent: Aug 11 '05 09:19
>
> Dimiter, that part has 5V tolerant PCI I/O. If the memory I/O's are
> similarly tolerant, it is easy to understand why you don't have reliability
> issues.
>
> Steve.
>
>
> At 09:07 AM 8/11/2005 +0300, Dimiter Popoff wrote:
> >Like I mentioned, he controller was an 8240 (MPC8240 of Motorola, now
> >Freescale).
> >If keeping connections within about an inch or just somewhat more length
> >is luck, then I guess I have been lucky.
> >
> >Dimiter
> >
> >------------------------------------------------------
> >Dimiter Popoff Transgalactic Instruments
> >
> >http://www.tgi-sci.com
> >------------------------------------------------------
> >
> >
> >
> >
> >-------Original Message-------
> > > From: steve weir <weirsi@xxxxxxxxxx>
> > > Subject: Re: [SI-LIST] Re: termination for routing 8 SDRAMs to
> > single Processor
> > > Sent: Aug 11 '05 09:03
> > >
> > > Dimiter, you may have lucked out on that one. Repeated, excess
> overshoot
> > > is well demonstrated to shorten the life of components, especially newer
> > > low voltage devices. What was the controller?
> > >
> > > Steve.
> > > At 08:55 AM 8/11/2005 +0300, Dimiter Popoff wrote:
> > > >Is about 4 years practically continuous operation good enough?
> > > >The design has demonstrated it.
> > > >
> > > >Dimiter
> > > >
> > > >------------------------------------------------------
> > > >Dimiter Popoff Transgalactic Instruments
> > > >
> > > >http://www.tgi-sci.com
> > > >------------------------------------------------------
> > > >
> > > >
> > > >
> > > >
> > > >-------Original Message-------
> > > > > From: Kenneth W. Egan <kegan@xxxxxxxxxxxxx>
> > > > > Subject: RE: [SI-LIST] Re: termination for routing 8 SDRAMs to
> single
> > > > Processor
> > > > > Sent: Aug 11 '05 05:21
> > > > >
> > > > > The question might not be one of stability, but one of
> > reliability in the
> > > > > long term. Sure, you'll probably meet setup and hold to/from the
> > SDRAM.
> > > > > However, SDRAM typically has some pretty hot drivers (that I've
> seen,
> > > > > simulated and measured in circuit ) and the real issue is over
> > stressing
> > > > > The input protection on the receiver, i.e. overshoot issues.
> > > > >
> > > > > Failure modes in this case may not occur until much later in time.
> > > > >
> > > > > KWE
> > > > >
> > > > >
> > > > > -----Original Message-----
> > > > > From: si-list-bounce@xxxxxxxxxxxxx
> > > > [mailto:si-list-bounce@xxxxxxxxxxxxx] On
> > > > > Behalf Of Dimiter Popoff
> > > > > Sent: Wednesday, August 10, 2005 8:00 PM
> > > > > To: aavinda12@xxxxxxxxx; si-list@xxxxxxxxxxxxx
> > > > > Subject: [SI-LIST] Re: termination for routing 8 SDRAMs to single
> > > > Processor
> > > > >
> > > > > I have rooted 8 x8 SDRAMs to an 8240 without any terminations and
> it
> > > > worked
> > > > > remarkably stable. However, I had 64 data bits rather than 32.
> > > > > I had put 4 SDRAM chips on top and 4 on the bottom of the board,
> > > > practically
> > > > > next to the CPU, no connectors between.
> > > > >
> > > > > Dimiter
> > > > >
> > > > > ------------------------------------------------------
> > > > > Dimiter Popoff Transgalactic Instruments
> > > > >
> > > > > http://www.tgi-sci.com
> > > > > ------------------------------------------------------
> > > > >
> > > > >
> > > > >
> > > > >
> > > > > -------Original Message-------
> > > > > > From: Aravnda G <aavinda12@xxxxxxxxx>
> > > > > > Subject: [SI-LIST] termination for routing 8 SDRAMs to single
> > > > > > Processor
> > > > > > Sent: Aug 11 '05 03:29
> > > > > >
> > > > > > Hi All,
> > > > > > I am working with a micro-processor conneted to 8 SDRAM with
> > 12 address
> > > > > lines to all SDRAMs and 32 data lines each to two sets of four
> > SDRAMs.
> > > > I was
> > > > > wondering if anyone has managed to route this sort of topology
> > without
> > > > using
> > > > > terminations. If so please send information on topology used. The
> > IO are
> > > > > lvttl compatible at 3.3V. Any input on routing possibilities is
> > welcome.
> > > > > >
> > > > > > Thanks & Regards,
> > > > > > Alex.
> > > > > >
> > > > > > ---------------------------------
> > > > > > Yahoo! Mail
> > > > > > Stay connected, organized, and protected. Take the tour
> > > > > >
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