[SI-LIST] Re: Article discussion on bad packages

  • From: "Istvan NOVAK" <istvan.novak@xxxxxxxxxxxxxxxx>
  • To: <Chris.Cheng@xxxxxxxxxxxx>
  • Date: Wed, 29 Dec 2004 11:20:33 -0500

Chris,

Without going into confidential details, let me answer with a
question: do you honestly think that large cores of today's big
CPUs can be included at the transistor level for PDN simulations?
And even if it was technically possible, do we need all the
transistor-level details when we want to simulate the noise at
the PCB level?  The package behaves like a redistribution filter,
and for the PCB-package interface, all what people need is the
distilled characteristics.  It can be IBIS or anything else,
eventually it is behavioral model.

Regards,

Istvan Novak
SUN Microsystems

----- Original Message -----
From: "Chris Cheng" <Chris.Cheng@xxxxxxxxxxxx>
Cc: <si-list@xxxxxxxxxxxxx>
Sent: Wednesday, December 29, 2004 12:12 AM
Subject: [SI-LIST] Re: Article discussion on bad packages


> Istvan,
> I thought I understand enough of your company's design methodologies (I
> worked on quite a few of them). So I am surprised to hear your response.
Can
> you honest tell me your company is not running SPICE on "sophisticated IO
> circuits" to analyze its performance nor using it to analyze core power
> distribution ? Are you relying only on IBIS nowadays ? Or you are
preaching
> something you don't practice yourself ?
>
>
> -----Original Message-----
> From: Istvan NOVAK
> To: Chris.Cheng@xxxxxxxxxxxx
> Cc: si-list@xxxxxxxxxxxxx
> Sent: 12/28/2004 8:36 PM
> Subject: Re: [SI-LIST] Re: Article discussion on bad packages
>
> Chris,
>
> If you want to simulate PDN SSN, you can do either a
> transistor-level SPICE simulation together with the PDN
> model, or an approximate behavioral model simulation can
> be done.  For smaller circuits, transistor level models may
> work in SPICE (if you have access to it).  For large chunks
> of silicon, like CPU cores and sophisticated IO circuits, the
> SPICE model may be prohibitively large.  Also, for many
> users of third-party silicons, transistor-level SPICE model
> may not be available.  For the above reasons, behavioral
> simulations may still be better than doing no simulations at all
>
> Regards,
>
> Istvan Novak
> SUN Microsystems
>
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