[SI-LIST] Re: Article discussion on bad packages
- From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
- To:
- Date: Tue, 28 Dec 2004 21:12:29 -0800
Istvan,
I thought I understand enough of your company's design methodologies (I
worked on quite a few of them). So I am surprised to hear your response. Can
you honest tell me your company is not running SPICE on "sophisticated IO
circuits" to analyze its performance nor using it to analyze core power
distribution ? Are you relying only on IBIS nowadays ? Or you are preaching
something you don't practice yourself ?
-----Original Message-----
From: Istvan NOVAK
To: Chris.Cheng@xxxxxxxxxxxx
Cc: si-list@xxxxxxxxxxxxx
Sent: 12/28/2004 8:36 PM
Subject: Re: [SI-LIST] Re: Article discussion on bad packages
Chris,
If you want to simulate PDN SSN, you can do either a
transistor-level SPICE simulation together with the PDN
model, or an approximate behavioral model simulation can
be done. For smaller circuits, transistor level models may
work in SPICE (if you have access to it). For large chunks
of silicon, like CPU cores and sophisticated IO circuits, the
SPICE model may be prohibitively large. Also, for many
users of third-party silicons, transistor-level SPICE model
may not be available. For the above reasons, behavioral
simulations may still be better than doing no simulations at all
Regards,
Istvan Novak
SUN Microsystems
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