[SI-LIST] Fibre channel interconnect margins

  • From: Babid A <babid_a@xxxxxxxxx>
  • To: si-list@xxxxxxxxxxxxx
  • Date: Fri, 30 Jun 2006 11:19:43 -0700 (PDT)

  we have a fibre channal interfaces(@2.125Gbps) running on our boards  and 
looking for ways to stress the links. Right now, I am playing with  chip 
settings like pre-emphasis, equalization,amplitude, longer cables  etc. 
  I really apprecaite any other suggestions/ideas to stress the links to  find 
out the margins. What is the right way of quantifying the signal  margins?
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