[SI-LIST] Re: ESD is a low frequency event -really??
- From: Chris Cheng <Chris.Cheng@xxxxxxxxxxxx>
- To: "'tbiggs@xxxxxxxxxxxxxxxxxxxxx'" <tbiggs@xxxxxxxxxxxxxxxxxxxxx>,si-list@xxxxxxxxxxxxx
- Date: Wed, 10 Mar 2004 18:15:30 -0800
Well, let's not attack and look at the technical reason.
In order to induce a functional failure, you will have to couple the common
mode disturbance on the local ground to either the core power distribution
on die (to cause internal IC failure) or signal lines w.r.t. the receiving
reference (to cause I/O failure).
If you look at the signaling failure case, what you really want is the local
signals that happen to reference the local disturbance to be as tightly
coupled to the disturbance itself so that the signal and its return cancel
out the local disturbance.
Translation : manage your signal and its reference tight ("Common Sense
Principle" again).
If you start off with an improperly reference plane and it suffers an ESD
discharge event that results in local common mode noise, you will need the
BC planes to minimize the common mode noise on the reference plane that can
not follow the return current path. But two wrong don't equal to one right.
Let's also look at the impact on the core power distribution case. If for
some unfortunate case the discharge happens through your package (as in the
case I had with the oscillator), any BC on the PCB has to run through the
same <100MHz die/packaging power distribution choke point as I point out
many times.
Translation : Not much you can help with BC on board.
The reverse is also true for common mode noise that happens externally to
the chip on board. You first have to generate enough noise, then get through
the <100MHz decoupling and planes caps then you have to run through the
>100MHz filtering by the package to harm the die. This is exactly the reason
why I prefer multiple chassis and logic ground attachment (tight coupling)
because it will end up having a much lower impedance path for the common
mode noise to flow out instead of needing to go through your precious
package and critical die.
Does this sound technical enough for you ?
-----Original Message-----
From: Tom Biggs [mailto:tbiggs@xxxxxxxxxxxxxxxxxxxxx]
Sent: Wednesday, March 10, 2004 4:52 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ESD is a low frequency event -really??
"I presume you can give us some real example of systems with proper
stackup failing ESD test and when BC is added it 'magically'(sic) passed
?" "This is a simple yes or no answer."
-reply-
"Designs within these companies were aided in the=20
correction of susceptibilities by the use of BC."
This sounds like a simple yes to me. Maybe you read it differently.=20
If you don't think it would work tell us why. I bet most of the readers
on this list would be interested in hearing this, rather than hearing
you attacking another list poster no matter how poorly you think he
presents his case.=20
-----Original Message-----
From: Chris Cheng [mailto:Chris.Cheng@xxxxxxxxxxxx]=20
Sent: Wednesday, March 10, 2004 4:01 PM
To: 'MikonCons@xxxxxxx'; si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ESD is a low frequency event -really??
No real data/example, still speculation.
You can't just say I've done it 35 years therefore it must be correct if
you can't even tell me there is a single case where a properly stackup
PCB without BC will fail ESD test and after adding BC it works. This is
a simple yes or no answer, nothing proprietary about it. I am still
waiting.
-----Original Message-----
From: MikonCons@xxxxxxx [mailto:MikonCons@xxxxxxx]
Sent: Wednesday, March 10, 2004 3:42 PM
To: si-list@xxxxxxxxxxxxx
Subject: [SI-LIST] Re: ESD is a low frequency event -really??
In a message dated 3/10/2004 11:11:27 AM Pacific Standard Time,=20
Chris.Cheng@xxxxxxxxxxxx writes:
When it comes to BC, I have to agree with Simon.....
http://home.graffiti.net/3par/si1.jpg
Since you mentioned it is not a speculation, I presume you can give us
some real example of systems with proper stackup failing ESD test and
when BC is added it magically passed ? Care to share the information ?
************
Your reference to Simon, who states "This topic is
absolutely....DREADFUL,"=20
as well as your "real example" and "magically passed" comments have
clearly=20
negative (and offensive) connotations.
As any professional consultant knows, it would be folly (as well as
illegal)
to disclose details on any particular design of a client. However, not
by=20
magic, but through well thought out design techniques, I have
successfully=20
integrated solutions for SI, radiated emissions, and ESD problems to
rectify multiple=20
hardware designs (on the order of 50-60 different designs out of
hundreds of
designs) for Nokia, Boeing, Aerojet Electronics, NASA (Tayco
Engineering),=20
Hewlett-Packard (Systems Div.), Intel (Communications Div.), an
international=20
set-top box manufacturer, a major DNA analysis firm (SF Bay area),
United=20
Technologies, and multiple other major firms, not to mention salvaging
two separate=20
>$100-million programs by modeling, analysis, and demonstrating=20
>corrective
actions using BC concepts. Designs within these companies were aided in
the=20
correction of susceptibilities by the use of BC (both licensed versions
and=20
near-equivalent versions prior to their availability).
As far as knowledge of the benefits and detriments (basicly cost) of
designs
incorporating BC, I am confident I have a distinct experience advantage
over
you (Chris). I used BC concepts in many edge-cutting military and
aerospace=20
designs before Zycon developed and patented the superior process
technology=20
needed to reliably mass produce same. I contacted them in 1989 to
explore their=20
capabilities, verify through my own tests (in my own lab), and critique
their=20
fabrication and test results. I ended up including their product
(ZBC-2000) in my=20
seminars and tutorials that covered the US, Europe, and parts of Asia.=20
Because of my background in advanced military, aerospace, and satellite
systems, I=20
was aware more than 35 years ago of many beneficial attributes of the BC
concept that still haven't been widely disseminated. I gather, perhaps
incorrectly,=20
that your experience (Chris) is only commercial and does not penetrate
the=20
glass ceiling of much more difficult design problems shared by many
aerospace=20
companies.
FYI, I only comment to the SI List infrequently as I have many other
things=20
to occupy my time. I never make statements on the SI List that I have
not=20
already proven to myself through both analysis and test to be valid
(unless I=20
clearly state it as a concept for exploration). Nor do I deem it
necessary (for me=20
or anyone else) to take the time to provide a bibliography of references
for
verification of the offered comments. Any such requirement (or request)=20
discourages the rapid exchange of ideas, comments, and general
discussion that the SI=20
forum offers, and makes one NOT want to comment. I have in the past and
still=20
do urge all designers with an interest in a given topic/thread to read,=20
absorb, and digest the comments, and then to THINK IT OUT FOR THEMSELVES
as to the=20
appropriateness for their particular designs. Most will find that some
of the=20
offered information is not applicable to their current needs, but might=20
someday be.
There. I think my steam is now released. Time to go trout fishing as the
ice
has broken up almost to the dam. My fishing buddy just called and says
they=20
are catching 18-22 inchers on dry flies and midges. This thread is DONE
for me.
Good Engineering to all.
Mike
Michael L. Conn
Owner/Principal Consultant
Mikon Consulting
Cell: (408)821-9843
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