Hello Clifford You have touched on some topics that are near and dear to me (and a few others, I am sure). I think I can safely say that there are some simulation methods appropriate for these speeds that are both robust and reliable. But they haven't quite been reduced to the realm of "simple" yet. Spice in its various flavors is highly accurate, assuming the models are accurate. But as you have observed, run times can be so slow as to be impractical. Simulators based on behavioral type models can provide much more reasonable run times, and if care is taken in developing and implementing the models, they can provide excellent accuracy as well. IBIS is an approach into which we here at Samtec are putting some major effort. But the official interconnect standard is so new that very few (if any?) simulation tools will actually accept such models for input. Of course, it is on the road map for implementation by most of the major players, and we are committed to providing models that meet this standard. We will be rolling them out starting in the next few months. In the mean time, we provide what we call "IBIS like" models that have been optimized for use in several simulators. You can find those at our website www.samtec.com. S-parameters work well for certain applications, but there are a few downsides (like model flexibility) associated with their use as well. You can expect to see more work from us in that area soon too. Currently we have worked with some SI system consultants (most notably, Teraspeed Consulting Group)to develop some combined simulation approaches. In a nutshell, we use spice models where we can, and use a full wave 3d field solver to generate s-parameters for structures that don't lend themselves well to spice models. We had a joint presentation with Teraspeed at DesignConn that described this process. You can download a copy here: http://www.samtec.com/reference/articles/pdfs/advances_in_modeling_interconn ects_DesignCon_East_0404.pdf We have also taken a slightly different approach to this problem. Since such simulations aren't yet a simple cut and paste operation, we take this task on ourselves for some general cases. Part of this process leads to what we call "Final Inch". In the Final Inch, we design a PCB layout for a certain connector under various signal/ground conditions. We develop models of the connector, pcb break out region, and traces. You can license this design from us at no charge, and we provide all the associated models (and test data that validates them). You can cut and paste this design into your system design, and cut and paste the models into your system simulation. We have recently taken this process one step further and begun to provide app notes for specific applications. Fortunately, one of the first applications we chose was a XUAI application based on the Xilinx Rocket I/O. You can find more information on that here: http://www.samtec.com/reference/articles/pdfs/QXE-DP_FI_XAUI_5mm_appl_notes. pdf A list of other applications currently available can be found here: http://www.samtec.com/reference/articles/articles.asp Basically, we are trying to do as much of this simulation work as possible on the front end. It just doesn't make sense for engineers the world over to have to reinvent the wheel with some of this stuff. You might be able to use our designs and models as is, or you might need to use bits and pieces, with a few tweaks required for your particular application. But this should definitely assist you in getting started. If you have any questions, feel free to drop a line to me, or to SIG@xxxxxxxxxxx We have a group of engineers who's job is to help you choose an appropriate high speed interconnect, and to help you interpret our data and implement our models. Julian Ferry High Speed Engineering Manager Samtec, Inc -----Original Message----- From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Clifford van Dyk Sent: Monday, July 26, 2004 1:32 PM To: si-list@xxxxxxxxxxxxx Subject: [SI-LIST] SI Simulation of GHz signals Hello I would like to perform reliable simulation of GHz signals (up to 3.125GHz), specifically Xilinx RocketIO. I would like to include in the simulation the effects of the following: Driver->PCB trace (incl. vias)->connector->cable->connector->PCB trace(incl. vias)->Receiver The models that I have obtained from the various vendors are HSPICE models. I have evaluated two of the most recommended S.I. toolchains: Mentor G. HyperLynx and Cadence Spectraquest. Both tools use HSPICE as the simulation engine, and essentially act as a front-end gui to HSPICE, as well as extracting the PCB trace/via models. My experiences thusfar with both tools have not been good. Anything but the most simplistic of traces causes the tools to either crash or take rediculous time to process (of the order of hours for even a simple net). A further issue is that both of these tool vendors claim that the HSPICE simulator is not necessary, and that the simulation can be performed without it, but practically this is not the case, due to a lack of availability of reliable models in anything other than HSPICE format. The conversion from HSPICE to any of the custom modelling types is also, in my opinion, non-trivial and potentially an extremely tedious manual process. I believe that S-Parameter based simulation provides much faster simulation, but again there is a lack of availability of S-Parameter models. Can anyone recommend a method for simulating the above signals that is simple, robust and reliable, or is the simulation of such signals still premature? Coming from a HW design background, I am fairly new to S.I., but it seems surprising that there is no industry-standard modelling type (equivalent of IBIS) that cable/connector vendors will provide, but maybe this level of simulation is in its infancy, and S-Parameter models will emerge as the standard? Is the simulation of such signals entirely necessary? I am dubious about the reliability of the results of such simulations, and I am wondering whether it is not more practical to just take all the precautions possible and hope for the best! Please let me know if you have any advise, or a good solution to my dilemma! Kind regards, Clifford ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List FAQ wiki page is located at: http://si-list.org/wiki/wiki.pl?Si-List_FAQ List technical documents are available at: http://www.si-list.org List archives are viewable at: //www.freelists.org/archives/si-list or at our remote archives: http://groups.yahoo.com/group/si-list/messages Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu