[SI-LIST] Re: SI Simulation of GHz signals
- From: Suresh Subramaniam <Suresh.Subramaniam@xxxxxxxxxx>
- To: clifford@xxxxxxxxxxxxx
- Date: Mon, 26 Jul 2004 16:57:51 -0700
Clifford,
Xilinx has a number of kits to help customers with needs similar to yours. Most
recently, Xilinx teamed with Ansoft to create a ?virtual test board? in
simulation equivalent to the Virtex II Pro-X test board. We have demonstrated
exteremly accurate correlations between simulation and measurement for a channel
comprising the BGA package, microstrip segments, differential vias and stripline
segments as well as SMA connectors for 10 Gb/s data rates. S-parameter as well
as parameterized models of the transmission lines and differential vias will be
available through our SI central website within a week or so. (The design kit
will include HFSS and Ansoft Designer models for the transmission path including
the FPGA package, transmission lines, differential via, and connectors. The kit
will also include the full, 10 gigabit channel circuit and system model, ready
to solve, in Ansoft Designer.) A white paper that explains this work will also
be available through the link above.
Also, the Special XCell On-Line for Signal Integrity Series features more than
10 technical articles from a number of signal integrity experts in the industry
to explore tools and methods you can use to combat signal and power integrity
distortions throughout your high-speed PCB development.
The Special XCell On-Line for Signal Integrity Series is now available at
http://www.xilinx.com/publications/xcellonline/xc_si49.htm
Also check out the SI seminar series that Xilinx is hosting at
http://www.xilinx.com/ise/alliance/si_seminar.htm
Hope that helps.
Regards,
Suresh
Clifford van Dyk wrote:
> Hello
> I would like to perform reliable simulation of GHz signals (up to
> 3.125GHz), specifically Xilinx RocketIO. I would like to include in the
> simulation the effects of the following:
> Driver->PCB trace (incl. vias)->connector->cable->connector->PCB
> trace(incl. vias)->Receiver
>
> The models that I have obtained from the various vendors are HSPICE
> models. I have evaluated two of the most recommended S.I. toolchains:
> Mentor G. HyperLynx and Cadence Spectraquest. Both tools use HSPICE as
> the simulation engine, and essentially act as a front-end gui to HSPICE,
> as well as extracting the PCB trace/via models. My experiences thusfar
> with both tools have not been good. Anything but the most simplistic of
> traces causes the tools to either crash or take rediculous time to
> process (of the order of hours for even a simple net). A further issue
> is that both of these tool vendors claim that the HSPICE simulator is
> not necessary, and that the simulation can be performed without it, but
> practically this is not the case, due to a lack of availability of
> reliable models in anything other than HSPICE format. The conversion
> from HSPICE to any of the custom modelling types is also, in my opinion,
> non-trivial and potentially an extremely tedious manual process.
>
> I believe that S-Parameter based simulation provides much faster
> simulation, but again there is a lack of availability of S-Parameter models.
>
> Can anyone recommend a method for simulating the above signals that is
> simple, robust and reliable, or is the simulation of such signals still
> premature? Coming from a HW design background, I am fairly new to S.I.,
> but it seems surprising that there is no industry-standard modelling
> type (equivalent of IBIS) that cable/connector vendors will provide, but
> maybe this level of simulation is in its infancy, and S-Parameter models
> will emerge as the standard?
>
> Is the simulation of such signals entirely necessary? I am dubious about
> the reliability of the results of such simulations, and I am wondering
> whether it is not more practical to just take all the precautions
> possible and hope for the best!
>
> Please let me know if you have any advise, or a good solution to my dilemma!
>
> Kind regards,
> Clifford
>
> ------------------------------------------------------------------
> To unsubscribe from si-list:
> si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
>
> or to administer your membership from a web page, go to:
> //www.freelists.org/webpage/si-list
>
> For help:
> si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
>
> List FAQ wiki page is located at:
> http://si-list.org/wiki/wiki.pl?Si-List_FAQ
>
> List technical documents are available at:
> http://www.si-list.org
>
> List archives are viewable at:
> //www.freelists.org/archives/si-list
> or at our remote archives:
> http://groups.yahoo.com/group/si-list/messages
> Old (prior to June 6, 2001) list archives are viewable at:
> http://www.qsl.net/wb6tpu
>
--
/ 7\'7 Suresh Subramaniam suresh.subramaniam@xxxxxxxxxx
\ \ Xilinx Telephone: 408-559-7778
/ / 2100 Logic Drive Direct: 408-879-6172
\_\/.\ San Jose, CA 95124 FAX: 408-377-9013
------------------------------------------------------------------
To unsubscribe from si-list:
si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field
or to administer your membership from a web page, go to:
//www.freelists.org/webpage/si-list
For help:
si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field
List FAQ wiki page is located at:
http://si-list.org/wiki/wiki.pl?Si-List_FAQ
List technical documents are available at:
http://www.si-list.org
List archives are viewable at:
//www.freelists.org/archives/si-list
or at our remote archives:
http://groups.yahoo.com/group/si-list/messages
Old (prior to June 6, 2001) list archives are viewable at:
http://www.qsl.net/wb6tpu
Other related posts:
