[SI-LIST] Re: Capacitors arrays? worth it or not?
- From: "jeanpierrepoulin" <JeanPierrePoulin@xxxxxxxxxxx>
- To: si-list@xxxxxxxxxxxxx
- Date: Sat, 20 May 2006 18:43:08 -0000
Thanks Steve for taking the time to share your expertise on this
tough subject!
From previous work in real designs with X2Y caps - assuming best
practice mounting and placement - what would you say is the 'minimum
cap value' where X2Ys are still useful? Is 10nF about the lower
limit?
Also... what 'three values of X2Y' have you found to be most
effective in high speed digital designs?
Thanks again!
Jean-Pierre
--- In si-list@xxxxxxxxxxxxxxx, steve weir <weirsi@...> wrote:
> Jean Pierre,
>
> Everytime I run this sort of exercise X2Y caps come out as the
lowest
> cost solution hands down.
>
> One X2Y cap: costs less than a 4X array ( much less than IDC ),
> outperforms a 4X array ( equal for IDC ), requires fewer via holes
6,
> versus 8 for the array, requires just one pick and place like the
> array and has a smaller footprint ( footprint includes vias ).
>
> i do consulting for X2Y and when customers run total manufactured
> cost, savings anywhere from 30-55% are typical versus the best
they
> can do using other methods.
>
> As to picking values, the starting point is to take the largest
value
> in a given package, and atttach that package using best low
> inductance practices. That gives you the widest frequency reach
for
> the component, sic it maximizes its efficiency. Whether to use
one,
> or more values of capacitors depends on circumstances of the
> particular design. With X2Y's the largest number of cap values I
> have seen is three.
>
> Steve.
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