[SI-LIST] Re: Capacitors arrays. worth it or not?

John, ( this would be a good use of John Powell's Sidraw tool. )
The following can all be viewed in a monospaced font like courier:

Z Axis --->
Regular MLCC Normal Orientation
=====>
   L L  L  L  L  L  L
   R   R  R  R  R  R  R
_______________________
     |     |     |     |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     | C| C| C| C| C| C|
     | G| G| G| G| G| G|
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
_______|_____|_____|
   L   L  L  L  L  L
   R   R  R  R  R  R
<======

IDC / X2Y
=====>
   L   L  L  L  L  L  L
   R   R  R  R  R  R  R
_______________________
____|_____|_____|_____|
____|_____|_____|_____|
____|_____|_____|_____|
     |     |     |     |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     | C| C| C| C| C| C|
     | G| G| G| G| G| G|
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
     |  |  |  |  |  |  |
_______|_____|_____|
_______|_____|_____|
_______|_____|_____|
_______|_____|_____|
   L   L  L  L  L  L
   R   R  R  R  R  R

<======

The multiple conductors have a coupling matrix.  With IDC and X2Y Lm 
greatly reduces Ltotal in each L/R segment, including the vias to the 
planes.  In the region of the capacitor proper, this is a uniform Tx 
line structure.  But there is a big impedance discontinuity at the 
left side of the dwg.  The lumped model averages out the LRCG

I hope this crude dwg helps.  If I get some time tonight I will make 
a better dwg.

Regards,


Steve.
At 01:29 PM 5/24/2006, Hill, John wrote:
>Steve,
>
>I am not so sure of this. In the MLCC there is a transmission line with
>an end that is open. It is the open 1/4 wavelength transmission line
>that provides the low impedance on the other side of the part.
>Specifically, a 1/4 wavelength away from the open is a short.
>
>In the IDC part the end is shorted, not open. There is a difference and
>I am uncertain how to predict the resonance. That is why Larry's
>viewpoint is important. It provided a better understand of the fields in
>the parts and why the resonance occurs in the first place. I would like
>to understand the IDC parts as well as we now understand the MLCC parts.
>
>Can anyone explain to me the physics behind the IDC resonance as
>compared to the MLCC resonance?
>
>I would also like to know the Dielectric constant of the MLCC ceramic to
>run the numbers and confirm the electrical length of the MLCC part. It
>would be interesting to confirm the measured series resonance is truly
>predicted by the 1/4 wavelength of the MLCC parts.
>
>John
>
>-----Original Message-----
>From: steve weir [mailto:weirsi@xxxxxxxxxx]
>Sent: Wednesday, May 24, 2006 4:12 PM
>To: Hill, John; Larry Smith; Mark.Randol@xxxxxxxxxx; si-list
>Subject: RE: [SI-LIST] Re: Capacitors arrays. worth it or not?
>
>John, the physics is the same for an IDC.  The only difference is
>that you multiple coupled lines in each part of Larry's model.  Until
>you get to really high frequency, you can simply replace those with
>smaller equivalent inductance of Ls - Lm.
>
>Regards,
>
>
>Steve.
>At 10:59 AM 5/24/2006, Hill, John wrote:
> >Larry,
> >
> >Your analysis of a capacitor as a transmission line is very insightful.
> >It explains the physics behind why a MLCC has a series resonance. I
>then
> >tried to apply the same technique to an IDC capacitor with both
> >terminals of the capacitor on both sides of the part.
> >
> >I was not able to determine where the first resonance would be. How
> >would you apply this technique to an IDC capacitor? And for that matter
> >does anyone know where the first resonance would be for an IDC
> >capacitor?
> >
> >Best regards,
> >
> >John
> >
> >-----Original Message-----
> >From: Larry Smith [mailto:LSMITH@xxxxxxxxxx]
> >Sent: Tuesday, May 23, 2006 12:47 PM
> >To: weirsi@xxxxxxxxxx; Hill, John; Mark.Randol@xxxxxxxxxx; si-list
> >Subject: RE: [SI-LIST] Re: Capacitors arrays. worth it or not?
> >
> >Steve, John - here is another interesting way to look at it.  When a
> >ceramic capacitor is mounted such that the capacitor plates are
>parallel
> >to the PCB plates, the capacitor forms a vertical transmission line
>with
> >inductance per unit length and capacitance per unit length.  The far
>end
> >of the transmission line is open circuit (air) and the near end is
> >nearly shorted (PCB power planes present a very low impedance to the
> >mounted capacitor).  This makes a quarter wavelength resonator similar
> >to a 50 Ohm transmission line that is open on one end.  At the quarter
> >wavelength frequency, the open circuit at the far end becomes a low
> >impedance node at the near end.  This is the series resonant frequency
> >of the capacitor.  The peaks and dips that you might see beyond the
> >series resonance of the capacitor are associated with the half, 3/4,
> >full,  1 1/4, etc, wavelengths of the capacitor transmission line.
> >
> >To see this effect, you must mount the capacitor on vias and pads that
> >have less inductance than the capacitor itself otherwise the resonance
> >is completely dominated by the mounting inductance.  Tall capacitors
> >with very low ESR show this effect the best.  I was evaluating a bunch
> >of capacitors one time and the 33nF NPO 2220 size capacitor strongly
> >exhibited these properties.  It is very tall and has low ESR because of
> >the many, many plates.  I had it mounted on a fixture estimated at 83pH
> >but the inductance associated with the capacitor itself was about 1 nH.
> >There were perhaps a half a dozen dips and peaks beyond series
>resonance
> >associated with the transmission line properties of the capacitor.
> >
> >David Hockanson and I did a couple of papers on this at 2002 and 2003
> >ECTC conference and another one at 2005 Design Con.  You can actually
> >use the transmission line properties of a capacitor to develop a ladder
> >SPICE model and extract the element values.  The model accurately
> >predicts the reduction of inductance and the increase in ESR of a
> >capacitor mounted on low inductance pads.  This is important to
>simulate
> >the parallel resonance that may occur between two capacitors or between
> >a capacitor and power planes.  Ceramic capacitors have a lot more ESR
> >and less ESL than might be expected from a simple RLC model beyond
> >series resonance.
> >
> >Mounting capacitors with the plates perpendicular to the PCB planes
> >(rather than parallel) eliminates or at least greatly changes this
> >mechanism.  As Istvan mentioned, the resonances are very much reduced.
> >I believe that there is still an increase in ESR and a reduction of ESL
> >beyond series resonance as the current does not want to get very far
> >away from the PCB power planes (big inductive loop).  Once again, you
> >would have to mount the capacitors on very low inductance mounts in
> >order to see this.
> >
> >Regards,
> >Larry Smith
> >Altera Corporation
> >
> >
> >-----Original Message-----
> >From: si-list-bounce@xxxxxxxxxxxxx
>[mailto:si-list-bounce@xxxxxxxxxxxxx]
> >On Behalf Of steve weir
> >Sent: Monday, May 22, 2006 11:27 PM
> >To: Hill, John; Mark.Randol@xxxxxxxxxx; si-list
> >Subject: [SI-LIST] Re: Capacitors arrays. worth it or not?
> >
> >John, you've got it.  The vertical orientation makes for N very small
> >cavities all acting in parallell.  Hence, the secondary resonance
> >occurs at a much higher frequency.
> >
> >Regards,
> >
> >
> >Steve.
> >At 01:50 PM 5/22/2006, Hill, John wrote:
> > >Steve,
> > >
> > >I'm sorry to be a little thick on this issue, but I may be getting
>the
> > >two orientations confused. If I understand you correctly, the
>following
> > >is true:
> > >
> > >It is Edie currents that keep the current concentrated in the lower
> > >plates of a capacitor when the capacitor is mounted horizontally,
>which
> > >we are defining as having the plates parallel to the board. This
> >creates
> > >a resonate cavity under the part.
> > >
> > >When the capacitor is mounted with the plates perpendicular to the
> >board
> > >the current flows through all the plates.
> > >
> > >Is this correct?
> > >
> > >John
> > >
> > >
> > >
> > >
> > >---------------------------------------
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> > >unlawful. When addressed to Takata customers or vendors, any
> > >information contained in this e-mail is subject to the terms and
> > >conditions in the governing contract, if applicable. If you have
> > >received this communication in error, please immediately notify us
> > >by return e-mail, permanently delete any electronic copies of this
> > >communication and destroy any paper copies.
> > >---------------------------------------
> > >-----Original Message-----
> > >
> > >From: steve weir [mailto:weirsi@xxxxxxxxxx]
> > >Sent: Monday, May 22, 2006 2:41 PM
> > >To: Hill, John; Mark.Randol@xxxxxxxxxx; si-list
> > >Subject: Re: [SI-LIST] Re: Capacitors arrays. worth it or not?
> > >
> > >John, when the plates of a cap are parallel to the planes, eddy
> > >currents block field penetration to the upper plates through the
> > >cavity.  The field still goes around the terminal metalization.  This
> > >makes a resonant cavity.
> > >
> > >Steve.
> > >At 10:50 AM 5/22/2006, Hill, John wrote:
> > > >Mark,=20
> > > >
> > > >We have uploaded an application note from American Technical
>Ceramics
> > > >concerning placing capacitors vertical and horizontal. The URL is:
> > > >
> > > >http://si-list.org/files/tech_files/ATC%20select_cap_wireless.pdf
> > > >
> > > >I have also sent an e-mail to the application engineer about the
> >issue
> > > >of eddy currents limiting the field. The data in the application
>note
> > > >does not look like it supports the idea and I do not understand the
> > > >physics.=20
> > > >
> > > >John
> > > >
> > > >
> > > >=20
> > > >
> > > >---------------------------------------
> > > >The information in this email and attachments hereto may contain
> > >legally =
> > > >privileged, proprietary or confidential information that is
>intended
> > >for =
> > > >a particular recipient. If you are not the intended recipient(s),
>or
> > >the =
> > > >employee or agent responsible for delivery of this message to the =
> > > >intended recipient(s), you are hereby notified that any disclosure,
>=
> > > >copying, distribution, retention or use of the contents of this
> >e-mail
> > >=
> > > >information is prohibited and may be unlawful. When addressed to
> >Takata
> > >=
> > > >customers or vendors, any information contained in this e-mail is =
> > > >subject to the terms and conditions in the governing contract, if =
> > > >applicable. If you have received this communication in error,
>please
> >=
> > > >immediately notify us by return e-mail, permanently delete any =
> > > >electronic copies of this communication and destroy any paper
>copies.
> > > >---------------------------------------
> > > >-----Original Message-----
> > > >
> > > >From: si-list-bounce@xxxxxxxxxxxxx
> > >[mailto:si-list-bounce@xxxxxxxxxxxxx]
> > > >On Behalf Of Mark Randol
> > > >Sent: Monday, May 22, 2006 10:33 AM
> > > >To: si-list
> > > >Subject: [SI-LIST] Re: Capacitors arrays. worth it or not?
> > > >
> > > > > -----Original Message-----
> > > > > From: si-list-bounce@xxxxxxxxxxxxx=3D20
> > > > > [mailto:si-list-bounce@xxxxxxxxxxxxx] On Behalf Of Jerry
>Martinson
> > > > >=3D20
> > > > > I've always wondered how discrete cap performance is
>affected=3D20
> > > > > if the caps plates are parallel with the underlying plane
>or=3D20
> > > > > if they are perpendicular.  I'd think that having them
>rolled=3D20
> > > > > 90 degrees
> > > > > (perpendicular) might make them perform better in some=3D20
> > > > > regions.  I wonder how this would extend to arrays and=3D20
> > > > > whether arrays are configured rolled or not.  Does anyone=3D20
> > > > > know? =3D20
> > > >
> > > >American Technical Ceramics (ATC) used to recommend 'vertical'
> > >placement
> > > >of their porcelain caps for just this reason.  I've seen it make
> > >several
> > > >100MHz's of difference in the measured resonance frequency.  That
>was
> > >on
> > > >a relatively thick 2 layer PCB, so on a board with a thinner
> >component
> > > >to ground layer spacing this could be more significant <guess>.  I
> > > >didn't find it on their web site, but here is their link.
> > > >
> > > >http://www.atceramics.com/
> > > >
> > > >Now how much of this was due to plate coupling to the substrate, or
> > > >reduced effective capacitance and inductance because of current
> > >crowding
> > > >towards the new 'bottom' of all the plates, beats me.  It seems to
>me
> > >in
> > > >the horizontal orientation, the upper plates would have slightly
>more
> > > >inductance due to the greater loop area.  Which effect dominates,
> > > >capacitance or inductance? =3D20
> > > >
> > > >The problem at the time was fixed, so we didn't investigate
>further.
> > > >
> > > >--
> > > >Mark Randol, RF Evaluation & Application Engineer
> > > >Not speaking for my company, etc
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