[SI-LIST] Re: Capacitors arrays? worth it or not?
- From: steve weir <weirsi@xxxxxxxxxx>
- To: JeanPierrePoulin@xxxxxxxxxxx,si-list@xxxxxxxxxxxxx
- Date: Fri, 19 May 2006 12:53:58 -0700
Jean Pierre,
Everytime I run this sort of exercise X2Y caps come out as the lowest
cost solution hands down.
One X2Y cap: costs less than a 4X array ( much less than IDC ),
outperforms a 4X array ( equal for IDC ), requires fewer via holes 6,
versus 8 for the array, requires just one pick and place like the
array and has a smaller footprint ( footprint includes vias ).
i do consulting for X2Y and when customers run total manufactured
cost, savings anywhere from 30-55% are typical versus the best they
can do using other methods.
As to picking values, the starting point is to take the largest value
in a given package, and atttach that package using best low
inductance practices. That gives you the widest frequency reach for
the component, sic it maximizes its efficiency. Whether to use one,
or more values of capacitors depends on circumstances of the
particular design. With X2Y's the largest number of cap values I
have seen is three.
Steve.
At 09:21 AM 5/19/2006, jeanpierrepoulin wrote:
>Hi and thanks for reading!
>
>We're building a pda-like device where PCB space is tight.
>
>In our situation (building a low-cost product), total cost of
>production is an important consideration, hence the effort to find a
>good `middle ground' in our choice of high-frequency ceramic
>decoupling caps balancing total cost of production and PCB real-
>estate.
>
>So far, I understand that 4-capacitor arrays only require a single
>cycle for the pick & place machine =96 thereby reducing costs and
>slightly reducing PCB area =96 but other engineers have mentioned that
>they are much more expensive=85
>
>So far, we're thinking of decoupling this board as follows:
>- Single ceramic caps for ~ 1uF
>- 4-Capacitor arrays between 100nF ~ 470nF
>- X2Ys or AVX LICC for 10nF to 100nF
>- (Not sure what to pick between the three for the very
>important ~100nF area)
>
>Any thoughts?
>
> Jean-Pierre
>
>(Board is probably HDI 1+b6+1 with controlled impedance @ 50ohm,
>interplane capacitance as high as possible for important 1V8 voltage
>rail (i.e. alternating 1V8-Gnd copper fills) fastest rise time
>is .75ns (for 266Mhz 1V8 DDR memory to CPU two centimeter away),
>four voltage rails between 1V2 to 3V3)
>
>
>
>
>
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