Hi, My colleague, a PDN engineer, insist he has to use ferrite bead to isolate an analog power plane from digital plane for an large FPGA I am using on a PCB design. I have been trying to convince him it would be better to have good decoupling filter by adding inner-plane capacitance and decoupling caps. But, he is insisting I should prove it either by theory or simulation before he can change his mind to remove the isolation ferrite bid and add planer cap in my board stack-up. I could not really prove by methodical thory nor have time and tool to simulate. With my shallow knowledge, it will just end with arguing even if he agree to do what I tell him to do. My knowledge is from my past board design with similar characteristics, I did not use the ferrite to isolate the analog and digital power planes. It worked fine. I also has shown him Lee Ritch's 2nd volume of "Right the first time". But, I guess it did not convince him. Please someone explain why analog and digital power isolation by using may be not a good idea. Please help. Thanks, Dong S. Kim ------------------------------------------------------------------ To unsubscribe from si-list: si-list-request@xxxxxxxxxxxxx with 'unsubscribe' in the Subject field or to administer your membership from a web page, go to: //www.freelists.org/webpage/si-list For help: si-list-request@xxxxxxxxxxxxx with 'help' in the Subject field List technical documents are available at: http://www.si-list.net List archives are viewable at: //www.freelists.org/archives/si-list Old (prior to June 6, 2001) list archives are viewable at: http://www.qsl.net/wb6tpu