[SI-LIST] Re: anlog and digital power plane isolation with ferrite bead good idea?
- From: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>
- To: "Dan Smith" <Dan.Smith@xxxxxxxxx>, "Dong Kim" <kimdongsik_us@xxxxxxxxx>, "steve weir" <weirsi@xxxxxxxxxx>, <si-list@xxxxxxxxxxxxx>
- Date: Mon, 3 Jan 2011 12:19:11 -0800
Good reply!
--------------------------------------------------
From: "Dan Smith" <Dan.Smith@xxxxxxxxx>
Sent: Monday, January 03, 2011 12:07 PM
To: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>; "Dong Kim"
<kimdongsik_us@xxxxxxxxx>; "steve weir" <weirsi@xxxxxxxxxx>;
<si-list@xxxxxxxxxxxxx>
Cc: "Istvan Novak" <istvan.novak@xxxxxxx>; "liuluping 41830"
<liuluping@xxxxxxxxxx>
Subject: [SI-LIST] Re: anlog and digital power plane isolation with ferrite
bead good idea?
> Dong,
>
> The best way to convince him, perhaps, is to ignore his advice and do a
> proper PDS design like you want to. Then, when the results come in prove
> it to him based on your evidence. I have been doing 3GIG and 10GIG SERDES
> designs for 8 years and only used ferrite beads once. That was my first
> SERDES design and I too followed advice of someone else - It was also the
> only time my SERDES design didn't work! Since, I have never used a
> ferrite bead (initially ignoring several people and doing my own
> engineering) and have been successful for the last 7 years - including
> across backplanes. The key, though, is performing a PDS (which includes
> instantaneous currents and a stable power supply) and not just simply
> removing the ferrite beads.
>
> Dan
>
> -----Original Message-----
> From: si-list-bounce@xxxxxxxxxxxxx [mailto:si-list-bounce@xxxxxxxxxxxxx]
> On Behalf Of Lee Ritchey
> Sent: Monday, January 03, 2011 9:44 AM
> To: Dong Kim; steve weir; si-list@xxxxxxxxxxxxx
> Cc: Istvan Novak; liuluping 41830
> Subject: [SI-LIST] Re: anlog and digital power plane isolation with
> ferrite bead good idea?
>
> Dong,
> I have attached a PDS design program from Altera. Notice that it does not
> include any ferrite beads. same kind of thing is available from Xilinx.
>
> Yes, old applications notes from both Altera an Xilinx said to use ferrite
> beads. This was never good advice and has finally been taken from their
> app
> notes, but not before may engineers got conned into using ferrite beads.
>
> Lee
>
> --------------------------------------------------
> From: "Dong Kim" <kimdongsik_us@xxxxxxxxx>
> Sent: Monday, December 27, 2010 4:03 PM
> To: "Lee Ritchey" <leeritchey@xxxxxxxxxxxxx>; "steve weir"
> <weirsi@xxxxxxxxxx>; <si-list@xxxxxxxxxxxxx>
> Cc: "Istvan Novak" <istvan.novak@xxxxxxx>; "liuluping 41830"
> <liuluping@xxxxxxxxxx>
> Subject: [SI-LIST] anlog and digital power plane isolation with ferrite
> bead
> good idea?
>
>> Hi,
>>
>> My colleague, a PDN engineer, insist he has to use ferrite bead to
>> isolate
>> an analog power plane from digital plane for an large FPGA I am using on
>> a
>> PCB design.
>> I have been trying to convince him it would be better to have good
>> decoupling filter by adding inner-plane capacitance and decoupling caps.
>>
>> But, he is insisting I should prove it either by theory or simulation
>> before he can change his mind to remove the isolation ferrite bid and add
>> planer cap in my board stack-up. I could not really prove by methodical
>> thory nor have time and tool to simulate.
>>
>> With my shallow knowledge, it will just end with arguing even if he
>> agree
>> to do what I tell him to do.
>> My knowledge is from my past board design with similar characteristics,
>> I
>> did not use the ferrite to isolate the analog and digital power planes.
>> It worked fine.
>> I also has shown him Lee Ritch's 2nd volume of "Right the first time".
>> But, I guess it did not convince him.
>>
>> Please someone explain why analog and digital power isolation by using
>> may
>> be not a good idea.
>>
>> Please help.
>>
>> Thanks,
>>
>> Dong S. Kim
>>
>>
>>
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